Bond pads for semiconductor die assemblies, and associated methods and systems are disclosed. In one embodiment, a semiconductor die assembly includes a first semiconductor die including a first bond pad on a first side of the first semiconductor die. The semiconductor die assembly further includes a second semiconductor die including a second bond pad on a second side of the second semiconductor die. The first bond pad is aligned and bonded to the second bond pad at a bonding interface between the first and second bond pads, and at least one of the first and second bond pads include a first metal and a second metal different than the first metal. Further, the first metal is located at the bonding interface and the second metal has a first thickness corresponding to at least one-fourth of a second thickness of the first or second bond pad.

After finishing of the front side CMOS manufacturing process, the silicon wafer is permanently bonded with its front side onto a carrier wafer. The carrier wafer is a high resistivity silicon wafer or a wafer of a dielectric or of a ceramic material. The silicon substrate of the device wafer is thinned from the back side such that the remaining silicon thickness is only a few micrometers. In the area dedicated to a spiral inductor, the substrate material is entirely removed by a masked etching process and the resulting gap is filled with a dielectric material. A spiral inductor coil is formed on the backside of the wafer on top of the dielectric material. The inductor coil is connected to the CMOS circuits on the front side by through-silicon vias.

After finishing of the front side CMOS manufacturing process, the silicon wafer is permanently bonded with its front side onto a carrier wafer. The carrier wafer is a high resistivity silicon wafer or a wafer of a dielectric or of a ceramic material. The silicon substrate of the device wafer is thinned from the back side such that the remaining silicon thickness is only a few micrometers. In the area dedicated to a spiral inductor, the substrate material is entirely removed by a masked etching process and the resulting gap is filled with a dielectric material. A spiral inductor coil is formed on the backside of the wafer on top of the dielectric material. The inductor coil is connected to the CMOS circuits on the front side by through-silicon vias.

A semiconductor device includes a first semiconductor component including a first semiconductor substrate and a first wiring structure, and a second semiconductor component including a second semiconductor substrate and a second wiring structure. A first surface of the first semiconductor component and a second surface of the second semiconductor component are bonded together. Assuming that regions having circumferences respectively corresponding to shapes obtained by vertically projecting the first surface, the second surface, the first wiring structure, and the second wiring structure on a virtual plane are first to fourth regions, respectively, an area of the first region is smaller than an area of the second region, the entire circumference of the first region is included in the second region, an area of the fourth region is smaller than an area of the third region, and the entire circumference of the fourth region is included in the third region.

A substrate or semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a solder cup. The semiconductor device assembly includes a substrate disposed over another substrate. At least one solder cup extends from one substrate towards an under bump metal (UBM) on the other substrate. The barrier on the exterior of the solder cup may be a standoff to control a bond line between the substrates. The barrier may reduce solder bridging during the formation of a semiconductor device assembly. The barrier may help to align the solder cup with a UBM when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of substrates and/or semiconductor devices.

A substrate or semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a solder cup. The semiconductor device assembly includes a substrate disposed over another substrate. At least one solder cup extends from one substrate towards an under bump metal (UBM) on the other substrate. The barrier on the exterior of the solder cup may be a standoff to control a bond line between the substrates. The barrier may reduce solder bridging during the formation of a semiconductor device assembly. The barrier may help to align the solder cup with a UBM when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of substrates and/or semiconductor devices.

A method of preparing a substrate for substrate bonding is provided. The method comprises: forming a recess in a substrate surface of the substrate, and forming a bondable dielectric layer on the substrate surface of the substrate. The bondable dielectric layer has a bonding surface on an opposite side of the bondable dielectric layer to the substrate surface, wherein the recess and the bondable dielectric layer define a dielectric cavity having a dielectric cavity volume. A plug is formed configured to make electrical contact to the substrate in the dielectric cavity volume. The plug has a plug volume which is less than the dielectric cavity volume, wherein the plug extends from the dielectric cavity beyond the bonding surface in a direction generally normal to the bonding surface. The plug is coined by compressing the substrate between opposing planar surfaces such that a contact surface of the plug is made co-planar with the bonding surface.

A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

A bonding device measures a position deviation amount of the chip with respect to the substrate in a state where the chip and the substrate are in contact, and corrects and moves the chip relatively to the substrate in such a way as to reduce the position deviation amount, based on the measured position deviation amount. Then, the bonding device fixes the chip to the substrate by irradiating a resin portion of the chip with an ultraviolet ray and curing the resin portion when the position deviation amount of the chip with respect to the substrate is equal to or less than a position deviation amount threshold value.