A semiconductor package includes a first semiconductor chip including a first bonding pad on a first surface of a first substrate, a first through electrode penetrating through the first substrate and electrically connected to the first bonding pad, a first recess with a desired depth in the first substrate from a second surface of the first substrate and exposing an end portion of the first through electrode, and a second bonding pad in the first recess and electrically connected to the first through electrode, a second semiconductor chip stacked on the second surface of the first substrate and including a third bonding pad on a third surface of a second substrate, and a conductive connection member between the second bonding pad and the third bonding pad. At least a portion of the conductive connection member may be in the first recess.

A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.

A display device including a display panel including a base layer, a circuit layer disposed on the base layer, and a pad part having a plurality of pads disposed on the base layer; and a driving chip disposed on the pad part and including a plurality of chip pads. The plurality of pads include a first pad having a smaller area than a corresponding chip pad among the plurality of chip pads and a second pad electrically connected to the circuit layer.

A display device including a display panel including a base layer, a circuit layer disposed on the base layer, and a pad part having a plurality of pads disposed on the base layer; and a driving chip disposed on the pad part and including a plurality of chip pads. The plurality of pads include a first pad having a smaller area than a corresponding chip pad among the plurality of chip pads and a second pad electrically connected to the circuit layer.

A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.

A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.

A semiconductor structure includes a first substrate, a plurality of first bonding pads disposed in the first dielectric layer, a plurality of second bonding pads disposed in the first dielectric layer, a second substrate, and a dielectric layer between the first substrate and the second substrate. The first bonding pads have a first width, and the second bonding pads have a second width greater than the first width. The second width is greater than the first width. The second bonding pads are arranged to form a frame pattern surrounding the first bonding pads. The first bonding pads and the second bonding pads are arranged to form a plurality of columns and a plurality of rows. Two of the second bonding pads are disposed at two opposite ends of each column and two opposite ends of each row.

A semiconductor structure includes a first substrate, a first dielectric layer disposed over the first substrate, a plurality of first bonding pads disposed in the first dielectric layer, a plurality of second bonding pads disposed in the first dielectric layer, a second substrate, and a second dielectric layer disposed over the second substrate. The first bonding pads have a first width. The second bonding pads have a second width greater than the first width. The second bonding pads are arranged to form a frame pattern surrounding the first bonding pads. A portion of the second dielectric layer is in physical contact with the second bonding pads. The first bonding pads and the second bonding pads are arranged to form a plurality of columns and a plurality of rows. Two of the second bonding pads are disposed at two opposite ends of each column and two opposite ends of each row.

A display device including a display panel including a base layer, a circuit layer disposed on the base layer, and a pad part having a plurality of pads disposed on the base layer; and a driving chip disposed on the pad part and including a plurality of chip pads. The plurality of pads include a first pad having a smaller area than a corresponding chip pad among the plurality of chip pads and a second pad electrically connected to the circuit layer.

A semiconductor structure includes a first substrate, a first dielectric layer disposed over the first substrate, a plurality of first bonding pads disposed in the first dielectric layer, a plurality of second bonding pads disposed in the first dielectric layer, a second substrate, and a second dielectric layer disposed over the second substrate. The first bonding pads have a first width. The second bonding pads have a second width greater than the first width. The second bonding pads are arranged to form a frame pattern surrounding the first bonding pads. A portion of the second dielectric layer is in physical contact with the second bonding pads. The first bonding pads and the second bonding pads are arranged to form a plurality of columns and a plurality of rows. Two of the second bonding pads are disposed at two opposite ends of each column and two opposite ends of each row.