Provided is an electronic component capable of reducing a possibility that insulating layers covering from outer edge portions of electrodes to surrounding portions, around the electrodes, of a substrate are separated from the electrodes and the substrate. An electronic component includes: a substrate; an electrode formed on a surface of the substrate; a protective portion covering at least a part of a peripheral portion of the electrode and a surrounding portion, around the electrode, of the surface of the substrate, across outer edge portions of the electrode, and extending in a circumferential direction along the outer edge portions of the electrode; and an extending portion extending, on the surface of the substrate, from the protective portion in an extending direction away from the electrode. A width of the extending portion perpendicular to the extending direction is longer than a width of the protective portion perpendicular to the circumferential direction.

A semiconductor package includes a package substrate, a first semiconductor chip mounted on the package substrate and that includes a first semiconductor substrate that includes through electrodes, and a second semiconductor chip disposed on the first semiconductor chip and that includes a second semiconductor substrate that includes an active surface and an inactive surface. The second semiconductor chip further includes a plurality of isolated heat dissipation fins that extend in a vertical direction from the inactive surface.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

Embodiments of bonded 3D memory devices and fabrication methods thereof are disclosed. In an example, a 3D memory device includes a first semiconductor structure, which includes a plurality of first NAND memory strings, a plurality of first BLs, at least one of the first BLs being conductively connected to a respective one of the first NAND memory strings; and a first bonding layer having a plurality of first bit line bonding contacts conductively connected to the plurality of first BLs, respectively. The 3D memory device further includes a second semiconductor structure, which includes a plurality of second NAND memory strings, a plurality of second BLs, at least one of the second BLs being conductively connected to a respective one of the second NAND memory strings, and a second bonding layer having a plurality of second bit line bonding contacts conductively connected to the plurality of second BLs, respectively.

A semiconductor package includes a bottom substrate and a top substrate space apart from the bottom substrate such that the bottom substrate and the top substrate define a gap therebetween. A logic die is mounted on a top surface of the bottom substrate. The logic die has a thickness of 125-350 micrometers. A plurality of copper cored solder balls is disposed between the bottom substrate and the top substrate around the logic die to electrically connect the bottom substrate with the top substrate. A sealing resin fills into the gap between the bottom substrate and the top substrate and sealing the logic die and the plurality of copper cored solder balls in the gap.

A film package includes a base film including peripheral regions on opposite ends of the base film in a width direction and extending in a lengthwise direction, an inner region between the peripheral regions and extending in the lengthwise direction, and sprocket holes provided on the peripheral regions at a regular interval in the lengthwise direction, and a unit film package provided on the base film and defined by a cut line, the unit film package including a mount region on the inner region and a connection region provided in the lengthwise direction from the mount region, the connection region extending from the inner region toward a location between the sprocket holes in the lengthwise direction.

A semiconductor package includes a substrate, a first chip structure disposed on the substrate, a second chip structure disposed on the substrate, at least one controller disposed between the first chip structure and the second chip structure, the at least one controller including edge pads disposed on edges opposing each other in a first direction, and center pads disposed between the edge pads, and bonding wire structures. The substrate includes first bonding pads arranged in a second direction, perpendicular to the first direction, and second bonding pads arranged in the second direction in at least one of a space between the first bonding pads and the first chip structure and a space between the first bonding pads and the second chip structure. The bonding wire structures include a first bonding wire structure connecting the edge pads to the first bonding pads, and a second bonding wire structure connecting the center pads to the second bonding pads.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

Embodiments of bonded 3D memory devices and fabrication methods thereof are disclosed. In an example, a 3D memory device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a plurality of first NAND memory strings and a plurality of first BLs. At least one of the first BLs may be conductively connected to a respective one of the first NAND memory strings. The first semiconductor structure also includes a plurality of first conductor layers, and a first bonding layer having a plurality of first bit line bonding contacts conductively connected to the plurality of first BLs and a plurality of first word line bonding contacts conductively connected to the first conductor layers. A second semiconductor structure includes a plurality of second NAND memory strings and a plurality of second BLs.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.