A method for forming a semiconductor device structure and method for forming the same are provided. The method includes hybrid bonding a first wafer and a second wafer to form a hybrid bonding structure, and the hybrid bonding structure comprises a metallic bonding interface and a polymer-to-polymer bonding structure. The method includes forming at least one through-substrate via (TSV) through the second wafer, and the TSV extends from a bottom surface of the second wafer to a top surface of the first wafer.

A three-dimensional stacking structure is described. The stacking structure includes at least a bottom die, a top die and a spacer protective structure. The bottom die includes contact pads in the non-bonding region. The top die is stacked on the bottom die without covering the contact pads of the bottom die and the bottom die is bonded with the top die through bonding structures there-between. The spacer protective structure is disposed on the bottom die and covers the top die to protect the top die. By forming an anti-bonding layer before stacking the top dies to the bottom dies, the top die can be partially removed to expose the contact pads of the bottom die for further connection.

A semiconductor package structure includes a control unit and a memory unit. The control unit includes a first wafer and a second wafer that are vertically stacked. The memory unit is disposed on the second wafer of the control unit. The memory unit includes multiple third wafers and a fourth wafer that are stacked vertically. The memory unit overlaps the control unit in a normal direction of the semiconductor package structure. In addition, a manufacturing method of the semiconductor package structure is provided.

A chip bonding method includes the following operations. A first chip is provided, which includes a first contact pad including a first portion lower than a first surface of a first substrate and a second portion higher than the first surface of the first substrate to form the stepped first contact pad. A second chip is provided, which includes a second contact pad including a third portion lower than a third surface of a second substrate and a fourth portion higher than the third surface of the second substrate to form the stepped second contact pad. The first chip and the second chip are bonded. The first portion of the first chip contacts with the fourth portion of the second chip, and the second portion of the first chip contacts with the third portion of the second chip.

A display apparatus includes: a circuit substrate; and a pixel array on the circuit substrate and including a plurality of pixels. The pixel array includes: light emitting diode (LED) cells constituting the plurality of pixels, each of the LED cells including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer; wavelength converters on the LED cells; an upper semiconductor layer on the LED cells and having a partition structure; a passivation layer on side surfaces of the LED cells; a first electrode along a region of the LED cells to have a grid shape; second electrodes connected to the second conductivity-type semiconductor layers; and reflective layers between the first electrode and the second electrode along the passivation layer on the side surfaces of the LED cells and having surfaces inclined toward outside of the LED cells.

In some embodiments, the present disclosure relates to method of forming an integrated circuit, including forming a semiconductor device on a frontside of a semiconductor substrate; depositing a dielectric layer over a backside of the semiconductor substrate; patterning the dielectric layer to form a first opening in the dielectric layer so that the first opening exposes a surface of the backside of the semiconductor substrate; depositing a glue layer having a first thickness over the first opening; filling the first opening with a first material to form a backside contact that is separated from the semiconductor substrate by the glue layer; and depositing more dielectric layers, bonding contacts, and bonding wire layers over the dielectric layer to form a second bonding structure on the backside of the semiconductor substrate, so that the backside contact is coupled to the bonding contacts and the bonding wire layers.

An inorganic light emitting diode is disclosed. The inorganic light emitting diode includes a first semiconductor layer, a second semiconductor layer having a light emitting surface composed of four sides, an active layer disposed between the first semiconductor layer and the second semiconductor layer, a first electrode coupled to the first semiconductor layer, and a second electrode coupled to the second semiconductor layer, wherein the light emitting surface has a trapezoid shape in which two opposing sides are symmetric with respect to each other.

A bonded structure is disclosed. The bonded structure can include a first element that includes a first bonding layer, the first bonding layer that has a first contact pad and a routing trace. The routing trace is formed at the same level as the first contact pad. The bonded structure can include a second element that includes a second bonding layer that has a second contact pad. The first element and the second element are directly bonded such that the first contact pad and the second contact pad are directly bonded without an intervening adhesive

A semiconductor structure includes: a first substrate, with a first opening being provided on a surface of first substrate; and a first bonding structure positioned in the first opening. The first bonding structure includes a first metal layer and a second metal layer with a melting point lower than that of the first metal layer. The first metal layer includes a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface, the second surface is provided with a first groove, an area, not occupied by the first metal layer and the first groove, of the first opening constitutes a second groove, the second metal layer is formed in the first groove and the second groove, and a surface, exposed from the second groove, of the second metal layer constitutes a bonding surface of the first bonding structure.

A high-resolution display device is provided. A display device having both high display quality and high resolution is provided. The display device is provided with a structure that inhibits a reduction in contrast due to the light guided by a layer extending across light-emitting elements. A structure body that absorbs or reflects visible light is provided between adjacent light-emitting elements. This structure body absorbs or reflects the light emitted from a light-emitting element and traveling toward an adjacent pixel, whereby a reduction in contrast due to stray light is inhibited.