In an embodiment, a package includes a first package structure including a first integrated circuit die having an active side and a back-side, the active side including die connectors, a second integrated circuit die adjacent the first integrated circuit die, the second integrated circuit die having an active side and a back-side, the active side including die connectors, a routing die including die connectors bonded to the active sides of the first integrated circuit die and the second integrated circuit die, the routing die electrically coupling the first integrated circuit die to the second integrated circuit die, an encapsulant encapsulating the first integrated circuit die, the second integrated circuit die, and the routing die, and a first redistribution structure on and electrically connected to the die connectors of the first integrated circuit die and the second integrated circuit die.

A semiconductor device includes an interconnect substrate having a plurality of pads formed on a first surface thereof, a semiconductor chip having a plurality of electrodes formed on a circuit surface thereof, the semiconductor chip being mounted on the interconnect substrate such that the circuit surface faces the first surface, a plurality of bonding members that are made of a same material and that electrically couple the pads and the electrodes, and a resin disposed on the first surface to encapsulate the semiconductor chip and to fill a gap between the circuit surface and the first surface, wherein the semiconductor chip is mounted on the interconnect substrate such that the gap between the circuit surface and the first surface progressively increases from a first side to a second side.

A semiconductor device includes an interconnect substrate having a plurality of pads formed on a first surface thereof, a semiconductor chip having a plurality of electrodes formed on a circuit surface thereof, the semiconductor chip being mounted on the interconnect substrate such that the circuit surface faces the first surface, a plurality of bonding members that are made of a same material and that electrically couple the pads and the electrodes, and a resin disposed on the first surface to encapsulate the semiconductor chip and to fill a gap between the circuit surface and the first surface, wherein the semiconductor chip is mounted on the interconnect substrate such that the gap between the circuit surface and the first surface progressively increases from a first side to a second side.

A chip package structure includes: a composite interposer including at least one in-interposer semiconductor chip including a respective semiconductor circuitry therein, a dielectric matrix laterally surrounding the at least one in-interposer semiconductor chip, a die-side redistribution structure located on a first side of the dielectric matrix, and a substrate-side redistribution structure located on a second side of the dielectric matrix; and at least one semiconductor die attached to the die-side redistribution structure through a respective array of solder material portions.

In an embodiment, a package includes a first package structure including a first integrated circuit die having an active side and a back-side, the active side including die connectors, a second integrated circuit die adjacent the first integrated circuit die, the second integrated circuit die having an active side and a back-side, the active side including die connectors, a routing die including die connectors bonded to the active sides of the first integrated circuit die and the second integrated circuit die, the routing die electrically coupling the first integrated circuit die to the second integrated circuit die, an encapsulant encapsulating the first integrated circuit die, the second integrated circuit die, and the routing die, and a first redistribution structure on and electrically connected to the die connectors of the first integrated circuit die and the second integrated circuit die.

Various aspects of the present disclosure generally relate to wireless communication, and to a pillar that includes one or more structures configured to define a capacitor. For example, a device includes a die, a substrate, and a pillar having an embedded capacitor. The pillar is electrically connected to one or more conductors of the die and to one or more conductors of the substrate. The pillar includes a first conductive structure and a second conductive structure. The pillar also includes a dielectric layer disposed between the first conductive structure and the second conductive structure to define the embedded capacitor.