H01L2224/225

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

A semiconductor package includes a chip, a redistribution structure, and first under-ball metallurgies patterns. The chip includes conductive posts exposed at an active surface. The redistribution structure is disposed on the active surface. The redistribution structure includes a first dielectric layer, a topmost metallization layer, and a second dielectric layer. The first dielectric layer includes first openings exposing the conductive posts of the chip. The topmost metallization layer is disposed over the first dielectric layer and is electrically connected to the conductive posts. The topmost metallization layer comprises first contact pads and routing traces connected to the first contact pads. The second dielectric layer is disposed on the topmost metallization layer and includes second openings exposing the first contact pads. The first under-ball metallurgies patterns are disposed on the first contact pads, extending on and contacting sidewalls and top surfaces of the first contact pads.

Semiconductor package and manufacturing method thereof

A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package at least has chip and a redistribution layer. The redistribution layer is disposed on the chip. The redistribution layer includes joining portions having first pads and second pads surrounding the chip. The first pads are arranged around a location of the chip and the second pads are arranged over the location of the chip. The second pads located closer to the chip are narrower than the first pads located further away from the chip.

Semiconductor devices having phase-change material (PCM) radio frequency (RF) switches and integrated active devices

An IC (integrated circuit) chip includes a substrate and a phase-change material (PCM) radio frequency (RF) switch, having a heating element, a PCM situated over the heating element, and PCM contacts situated over passive segments of the PCM. The heating element extends transverse to the PCM and underlies an active segment of the PCM. An active device is situated in the substrate. In one approach, the PCM RF switch is situated over the substrate, and the substrate is a heat spreader for the PCM RF switch. In another approach, the PCM RF switch is situated in or above a first metallization level, and a dedicated heat spreader is situated under the PCM RF switch. Alternatively, a PCM RF switch is situated in a flip chip, an active device is situated in the IC chip, and the flip chip is situated over the IC chip forming a composite device.

Semiconductor devices having phase-change material (PCM) radio frequency (RF) switches and integrated active devices

An IC (integrated circuit) chip includes a substrate and a phase-change material (PCM) radio frequency (RF) switch, having a heating element, a PCM situated over the heating element, and PCM contacts situated over passive segments of the PCM. The heating element extends transverse to the PCM and underlies an active segment of the PCM. An active device is situated in the substrate. In one approach, the PCM RF switch is situated over the substrate, and the substrate is a heat spreader for the PCM RF switch. In another approach, the PCM RF switch is situated in or above a first metallization level, and a dedicated heat spreader is situated under the PCM RF switch. Alternatively, a PCM RF switch is situated in a flip chip, an active device is situated in the IC chip, and the flip chip is situated over the IC chip forming a composite device.

Semiconductor Devices Having Phase-Change Material (PCM) Radio Frequency (RF) Switches and Integrated Active Devices

An IC (integrated circuit) chip includes a substrate and a phase-change material (PCM) radio frequency (RF) switch, having a heating element, a PCM situated over the heating element, and PCM contacts situated over passive segments of the PCM. The heating element extends transverse to the PCM and underlies an active segment of the PCM. An active device is situated in the substrate. In one approach, the PCM RF switch is situated over the substrate, and the substrate is a heat spreader for the PCM RF switch. In another approach, the PCM RF switch is situated in or above a first metallization level, and a dedicated heat spreader is situated under the PCM RF switch. Alternatively, a PCM RF switch is situated in a flip chip, an active device is situated in the IC chip, and the flip chip is situated over the IC chip forming a composite device.

Semiconductor Devices Having Phase-Change Material (PCM) Radio Frequency (RF) Switches and Integrated Active Devices

An IC (integrated circuit) chip includes a substrate and a phase-change material (PCM) radio frequency (RF) switch, having a heating element, a PCM situated over the heating element, and PCM contacts situated over passive segments of the PCM. The heating element extends transverse to the PCM and underlies an active segment of the PCM. An active device is situated in the substrate. In one approach, the PCM RF switch is situated over the substrate, and the substrate is a heat spreader for the PCM RF switch. In another approach, the PCM RF switch is situated in or above a first metallization level, and a dedicated heat spreader is situated under the PCM RF switch. Alternatively, a PCM RF switch is situated in a flip chip, an active device is situated in the IC chip, and the flip chip is situated over the IC chip forming a composite device.

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

A semiconductor package includes a chip, a redistribution structure, and first under- ball metallurgies patterns. The chip includes conductive posts exposed at an active surface. The redistribution structure is disposed on the active surface. The redistribution structure includes a first dielectric layer, a topmost metallization layer, and a second dielectric layer. The first dielectric layer includes first openings exposing the conductive posts of the chip. The topmost metallization layer is disposed over the first dielectric layer and is electrically connected to the conductive posts. The topmost metallization layer comprises first contact pads and routing traces connected to the first contact pads. The second dielectric layer is disposed on the topmost metallization layer and includes second openings exposing the first contact pads. The first under-ball metallurgies patterns are disposed on the first contact pads, extending on and contacting sidewalls and top surfaces of the first contact pads.

Semiconductor package and manufacturing method thereof

A semiconductor package includes a chip, a redistribution structure, and first under-ball metallurgies patterns. The chip includes conductive posts exposed at an active surface. The redistribution structure is disposed on the active surface. The redistribution structure includes a first dielectric layer, a topmost metallization layer, and a second dielectric layer. The first dielectric layer includes first openings exposing the conductive posts of the chip. The topmost metallization layer is disposed over the first dielectric layer and is electrically connected to the conductive posts. The topmost metallization layer comprises first contact pads and routing traces connected to the first contact pads. The second dielectric layer is disposed on the topmost metallization layer and includes second openings exposing the first contact pads. The first under-ball metallurgies patterns are disposed on the first contact pads, extending on and contacting sidewalls and top surfaces of the first contact pads.

SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD THEREOF

A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package at least has chip and a redistribution layer. The redistribution layer is disposed on the chip. The redistribution layer includes joining portions having first pads and second pads surrounding the chip. The first pads are arranged around a location of the chip and the second pads are arranged over the location of the chip. The second pads located closer to the chip are narrower than the first pads located further away from the chip.