Patent classifications
H
ELECTRICITY
Load children
H01
ELECTRIC ELEMENTS
Load children
H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
Load children
2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
Load children Filter patents View analytics View as hierarchy
H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Load children Filter patents View analytics View as hierarchy
H01L2224/18
High density interconnect [HDI] connectors; Manufacturing methods related thereto
Load children Filter patents View analytics View as hierarchy
H01L2224/23
Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
Load children Filter patents View analytics View as hierarchy
H01L2224/24
of an individual high density interconnect connector
Load children Filter patents View analytics View as hierarchy
H01L2224/24135
Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
Load children Filter patents View analytics View as hierarchy
H01L2224/24137
the bodies being arranged next to each other, e.g. on a common substrate
Filter patents View analytics View as hierarchy