Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/18
High density interconnect [HDI] connectors; Manufacturing methods related thereto
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H01L2224/23
Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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H01L2224/25
of a plurality of high density interconnect connectors
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H01L2224/251

Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same
09559088 · 2017-01-31 · ·

An apparatus includes a substrate having a land side having a plurality of contact pads and a die side opposite the land side. The apparatus includes a first die and a second die wherein the first die and second die are embedded within the substrate such that the second die is located between the first die and the land side of the substrate.