A display device may include a display area including pixel areas each including an emission area, a non-display area, and a pixel disposed in each of the pixel areas. The pixel may include a first electrode, a second electrode spaced apart from the first electrode and surrounding a periphery of the first electrode, a third electrode spaced apart from the second electrode and surrounding a periphery of the second electrode, a fourth electrode spaced apart from the third electrode and surrounding a periphery of the third electrode, light emitting elements disposed between the first to fourth electrodes, and first and second conductive lines disposed under the first to fourth electrodes with an insulating layer disposed therebetween. The first conductive line may be electrically connected to the first electrode, and the second conductive line may be electrically connected to the fourth electrode.

The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate, a first module disposed on the substrate, a second module disposed on the substrate and spaced apart from the first module, and a conductive element disposed outside of the substrate and configured to provide a signal transmission path between the first module and the second module.

The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate, a first module disposed on the substrate, a second module disposed on the substrate and spaced apart from the first module, and a conductive element disposed outside of the substrate and configured to provide a signal transmission path between the first module and the second module.

The present disclosure provides a circuit board with an embedded chip, which includes a dielectric layer, a first circuit layer, a chip, a conductive connector, and an insulating protection layer. The first circuit layer includes at least one first trace in the dielectric layer. The chip is in the dielectric layer and adjacent to the first trace, where the chip includes a plurality of chip pads at an upper surface of the chip. The conductive connector is on the upper surface of the chip and on the first circuit layer, where a lower surface of the conductive connector contacts at least one chip pad of the chip pads and an upper surface of the first trace. The insulating protection layer is on the chip, the first circuit layer, and the conductive connector, where the insulating protection layer contacts the upper surface of the chip.

A display device may include a display area including pixel areas each including an emission area, a non-display area, and a pixel disposed in each of the pixel areas. The pixel may include a first electrode, a second electrode spaced apart from the first electrode and surrounding a periphery of the first electrode, a third electrode spaced apart from the second electrode and surrounding a periphery of the second electrode, a fourth electrode spaced apart from the third electrode and surrounding a periphery of the third electrode, light emitting elements disposed between the first to fourth electrodes, and first and second conductive lines disposed under the first to fourth electrodes with an insulating layer disposed therebetween. The first conductive line may be electrically connected to the first electrode, and the second conductive line may be electrically connected to the fourth electrode.