In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.

In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.

A package that includes a substrate having a first surface; a solder resist layer coupled to the first surface of the substrate; a device located over the solder resist layer such that a portion of the device touches the solder resist layer; and an encapsulation layer located over the solder resist layer such that the encapsulation layer encapsulates the device. The solder resist layer is configured as a seating plane for the device. The device is located over the solder resist layer such that a surface of the device facing the substrate is approximately parallel to the first surface of the substrate. The solder resist layer includes at least one notch. The device is located over the solder resist layer such that at least one corner of the device touches the at least one notch.

In one example, a semiconductor device includes a substrate having a substrate first side, a substrate second side opposite to the substrate first side, and a conductive structure including internal terminals over the substrate first side; and external terminals over the substrate second side and coupled to the internal terminals. An electronic component includes an electronic component first side, an electronic component second side opposite to the electronic component first side, and an electronic component lateral side connecting the electronic component first side to the electronic component second side. The electronic component second side is coupled to one or more of the internal terminals. A guide structure is over the substrate first side and can include an inner portion that is laterally inward from the electronic component lateral side and an outer portion that is laterally outward from the electronic component lateral side. An underfill is interposed between the electronic component second side and the substrate first side and is over the guide structure. Other examples and related methods are also disclosed herein.

A method of manufacturing a light source device includes: disposing bumps containing a first metal on a first substrate which is thermally conductive; disposing a bonding member on the bumps, the bonding member containing Au—Sn alloy; disposing a light emitting element on the bumps and the bonding member; and heating the first substrate equipped with the bumps, the bonding member, and the light emitting element.

In a method of manufacturing a semiconductor device of one embodiment, support members and a film which is formed of a paste containing metal particles and surrounds the support members are provided above a surface of a base. Then a semiconductor element is provided above the support members and the film. Subsequently, the film is sintered to join the base and the semiconductor element. The support members are formed of a metal which melts at a temperature equal to or below a sintering temperature of the metal particles contained in the paste. The support members support the semiconductor element after the semiconductor element is provided above the support members and the film.

Methods and compositions are described for controlling bond line thickness of a joint formed during sintering. Spacer particles of a predetermined particle type and size are added in a predetermined concentration to a sintering paste to form a sintering paste mixture prior to sintering to achieve a targeted bond line thickness during sintering. The sintering paste mixture can be sintered under pressure and pressure-less process conditions. Under pressured sintering, the amount of pressure applied during sintering may be adjusted depending on the composition and concentration of the spacer particles to adjust bond line thickness.

In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.

A semiconductor device is provided. The semiconductor device includes a substrate having a surface. The semiconductor device includes a conductive pad over a portion of the surface. The conductive pad has a curved top surface, and a width of the conductive pad increases toward the substrate. The semiconductor device includes a device over the conductive pad. The semiconductor device includes a solder layer between the device and the conductive pad. The solder layer covers the curved top surface of the conductive pad, and the conductive pad extends into the solder layer.

A terminal connection portion, which includes an IC including a plurality of input bumps and a plurality of output bumps, and a terminal connection portion including a plurality of input terminal electrodes and a plurality of output terminal electrodes, is provided in a frame region, and in the terminal connection portion, an electrode insulating film is provided on the input terminal electrodes and the output terminal electrodes. A protruding portion is provided on the electrode insulating film, and the protruding portion overlaps with the IC in a plan view, and overlaps with the input bumps and the output bumps when viewed from a direction parallel to a substrate surface of a resin substrate layer.