The present invention provides a QFN packaging structure and QFN packaging method. The electromagnetic shielding layer as provided on the outer side of the QFN packaging structure by spacing at a certain interval from the leads may cooperate with the base island having the lug boss on the side edge, such that all surfaces of the chip can be electromagnetically shielded and protected while ensuring the insulation between the electromagnetic shielding layer and the leads.

The semiconductor device includes: a heat spreader; a semiconductor element joined to the heat spreader via a first joining member; a first lead frame joined to the heat spreader via a second joining member; a second lead frame joined to the semiconductor element via a third joining member; and a mold resin. In a cross-sectional shape obtained by cutting at a plane perpendicular to a one-side surface of the heat spreader, an angle on the third joining member side out of two angles formed by a one-side surface of the semiconductor element and a straight line connecting an end point of a joining surface between the third joining member and the semiconductor element and an end point of a joining surface between the third joining member and the second lead frame, is not smaller than 90° and not larger than 135°.

The semiconductor device includes: a heat spreader; a semiconductor element joined to the heat spreader via a first joining member; a first lead frame joined to the heat spreader via a second joining member; a second lead frame joined to the semiconductor element via a third joining member; and a mold resin. In a cross-sectional shape obtained by cutting at a plane perpendicular to a one-side surface of the heat spreader, an angle on the third joining member side out of two angles formed by a one-side surface of the semiconductor element and a straight line connecting an end point of a joining surface between the third joining member and the semiconductor element and an end point of a joining surface between the third joining member and the second lead frame, is not smaller than 90° and not larger than 135°.

A chip is mounted on a surface of the substrate, and the thermally conductive cover is disposed on a side that is of the chip and that is away from the substrate. There is a filling area on a surface that is of the thermally conductive cover and that faces the substrate, and the filling area is opposite to the chip. There is an accommodation cavity whose opening faces the substrate in the filling area. A thermal interface material layer is filled between the chip and a bottom surface of the accommodation cavity. Between an opening edge of the accommodation cavity and the substrate, there is a first gap connected to the accommodation cavity. The filling material encircles a side surface of the thermal interface material layer, so that the filling material separates the side surface of the thermal interface material layer from air.

A method of manufacturing a semiconductor device, the method including: preparing an insulated circuit substrate including a conductive plate; partially fixing a plate-like bonding member onto the conductive plate so as to make a positioning of the bonding member in a horizontal direction; mounting a semiconductor chip on the bonding member; and heating and melting the bonding member so as to form a bonding layer for bonding the insulated circuit substrate and the semiconductor chip each other.

A method of manufacturing a semiconductor device, the method including: preparing an insulated circuit substrate including a conductive plate; partially fixing a plate-like bonding member onto the conductive plate so as to make a positioning of the bonding member in a horizontal direction; mounting a semiconductor chip on the bonding member; and heating and melting the bonding member so as to form a bonding layer for bonding the insulated circuit substrate and the semiconductor chip each other.

A sintered member is provided between a semiconductor chip and a terminal. The sintered member is made of a sinter sheet by heating and pressing the same. The semiconductor chip is connected to the terminal via the sintered member. Convex portions are formed at a front-side surface of the semiconductor chip. Concave portions, each of which has such a shape corresponding to that of each convex portion of the semiconductor chip, are formed at a surface of the sintered member facing to the semiconductor chip.

A sintered member is provided between a semiconductor chip and a terminal. The sintered member is made of a sinter sheet by heating and pressing the same. The semiconductor chip is connected to the terminal via the sintered member. Convex portions are formed at a front-side surface of the semiconductor chip. Concave portions, each of which has such a shape corresponding to that of each convex portion of the semiconductor chip, are formed at a surface of the sintered member facing to the semiconductor chip.

A semiconductor device includes a vapor chamber lid for high power applications such as chip-on-wafer-on-substrate (CoWoS) applications using high performance processors (e.g., graphics processing unit (GPU)) and methods of manufacturing the same. The vapor chamber lid provides a thermal solution which enhances the thermal performance of a package with multiple chips. The vapor chamber lid improves hot spot dissipation in high performance chips, for example, at the three-dimensional (3D-IC) packaging level.

A semiconductor device includes a vapor chamber lid for high power applications such as chip-on-wafer-on-substrate (CoWoS) applications using high performance processors (e.g., graphics processing unit (GPU)) and methods of manufacturing the same. The vapor chamber lid provides a thermal solution which enhances the thermal performance of a package with multiple chips. The vapor chamber lid improves hot spot dissipation in high performance chips, for example, at the three-dimensional (3D-IC) packaging level.