Invention compositions are a replacement for high melting temperature solder pastes and preforms in high operating temperature and step-soldering applications. In the use of the invention, a mixture of metallic powders reacts below 350 degrees C. to form a dense metallic joint that does not remelt at the original process temperature.

A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.

A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.

A semiconductor device includes an electrode having a flat part and a non-flat part made up of a concave part, a joint layer being made of a sintered body of metal crystal grains provided on the flat part and the non-flat part of the electrode, and a semiconductor element being joined to the electrode with the joint layer therebetween, wherein the joint layer has a first region sandwiched between the non-flat part and the semiconductor element and a second region sandwiched between the flat part and the semiconductor element, and either one of the first region and the second region having a larger film thickness has a filling rate of the metal crystal grains smaller than the other one of the first region and the second region having a smaller film thickness. The present invention enhances reliability of a joint layer made of a sintered body of metal crystal grains.

A semiconductor device includes an electrode having a flat part and a non-flat part made up of a concave part, a joint layer being made of a sintered body of metal crystal grains provided on the flat part and the non-flat part of the electrode, and a semiconductor element being joined to the electrode with the joint layer therebetween, wherein the joint layer has a first region sandwiched between the non-flat part and the semiconductor element and a second region sandwiched between the flat part and the semiconductor element, and either one of the first region and the second region having a larger film thickness has a filling rate of the metal crystal grains smaller than the other one of the first region and the second region having a smaller film thickness. The present invention enhances reliability of a joint layer made of a sintered body of metal crystal grains.

A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.

A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.

A method of manufacturing a semiconductor power package includes: embedding a power semiconductor chip in an encapsulation, the encapsulation forming a housing of the semiconductor power package; and extending a layer of a covering material over at least a part of an outer main surface of the encapsulation. The covering material has a thermal conductivity greater than a thermal conductivity of the material of the encapsulation and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

A method of manufacturing a semiconductor power package includes: embedding a power semiconductor chip in an encapsulation, the encapsulation forming a housing of the semiconductor power package; and extending a layer of a covering material over at least a part of an outer main surface of the encapsulation. The covering material has a thermal conductivity greater than a thermal conductivity of the material of the encapsulation and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

A solder material comprising a solder alloy and a thermal conductivity modifying component. The solder material has a bulk thermal conductivity of between about 75 and about 150 W/m-K and is usable in enhancing the thermal conductivity of the solder, allowing for optimal heat transfer and reliability in electronic packaging applications.