A semiconductor device assembly includes a die stack, a plurality of thermoset regions, and underfill material. The die stack includes at least first and second dies that each have a plurality of conductive interconnect elements on upper surfaces. A portion of the interconnect elements are connected to through-silicon vias that extend between the upper surfaces and lower surfaces of the associated dies. The plurality of thermoset regions each comprise a thin layer of thermoset material extending from the lower surface of the second die to the upper surface of the first die, and are laterally-spaced and discrete from each other. Each of the thermoset regions extends to fill an area between a plurality of adjacent interconnect elements of the first die. The underfill material fills remaining open areas between the interconnect elements of the first die.

A diffusion soldering method for joining an electronic component to a substrate is provided. The joining surfaces are designed such that cavities are formed in a joining gap between the component and substrate. The formation of such cavities can be provided, e.g., by depressions in a mounting surface of the component and/or in a contact surface of the substrate, the depressions being cup-shaped and/or defining channels that surround columnar structural elements, the end faces of which define the mounting surface and/or contact surface. The cavities are designed such that solder material can leak into the cavities when the component during a heating process to achieve a desired width of the joining gap. This allows for the formation of a narrow-width joining having a diffusion zone that bridges the joining gap upon soldering. In this manner, a diffusion solder connection can be produced even using standard solder.

A component carrier assembly may include a component carrier, a component at least partially embedded within the stack, and an adhesive profile. The component carrier may include a stack of at least one electrically conductive layer structure and at least one electrically insulating layer structure. The component may have a first main surface, a second main surface opposed to the first main surface, and at least one lateral surface connecting the first main surface and the second main surface with each other. A first edge of the component may be formed where the first main surface and the at least one lateral surface meet. A second edge of the component may be formed where the second main surface and the at least one lateral surface meet. The adhesive profile may be disposed in a region of the first edge of the component.