Patent classifications
H01L2224/32012
Method for manufacturing electronic device
A method for manufacturing an electronic component includes preparing a mounting substrate provided with a first region to mount an electronic component thereon and a second region having conductivity, covering the second region with resin, applying a metal paste on the first region, mounting the electronic component on the first region with the metal paste, and removing the resin covering the second region. The mounting includes heating the mounting substrate to cure the metal paste with the electronic components being placed on the metal paste applied on the first region. The resin peeled from the second region by the heating is removed in the removing.
Semiconductor device and semiconductor apparatus
A semiconductor device that comprises a substrate with a primary surface and a secondary surface opposite to the primary surface. The primary surface provides a semiconductor active device. The semiconductor device includes a base metal layer deposited on the secondary surface and within the substrate via in which a vacancy is formed, and an additional metal layer on the base metal layer, the additional metal layer having different wettability against a solder as compared to the base metal layer whereby the solder is contactable by the base metal layer and repelled by the additional metal layer. The semiconductor device is die-bonded on the assembly substrate by interposing the solder between the secondary surface and the assembly substrate. The base metal layer in a portion that excepts the substrate via and a periphery of the substrate via by partly removing the additional metal layer is in contact with the solder.
SEMICONDUCTOR DEVICE HAVING A SOLDERED JOINT WITH ONE OR MORE INTERMETALLIC PHASES
A semiconductor device includes: a semiconductor die having a metal region; a substrate having a metal region; and a soldered joint between the metal region of the semiconductor die and the metal region of the substrate. One or more intermetallic phases are present throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the semiconductor die and the metal region of the substrate. The soldered joint has the same length-to-width aspect ratio as the semiconductor die.
SEMICONDUCTOR DEVICE HAVING A SOLDERED JOINT WITH ONE OR MORE INTERMETALLIC PHASES
A semiconductor device includes: a semiconductor die having a metal region; a substrate having a metal region; and a soldered joint between the metal region of the semiconductor die and the metal region of the substrate. One or more intermetallic phases are present throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the semiconductor die and the metal region of the substrate. The soldered joint has the same length-to-width aspect ratio as the semiconductor die.
MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
Since the solder 106 temporarily remaining in the first region 301 is in a state of being high in curvature, it is in point contact with the semiconductor element 105 at the vertex of the solder 106. Thereafter, the solder 106 is gradually wetted and spread from the center part to the peripheral part and from the first region 301 to the second region 302 while the semiconductor element 105 is pressed against the solder 106. At this time, since the solder 106 wets and spreads while discharging air, generation of voids can be suppressed.
MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
Since the solder 106 temporarily remaining in the first region 301 is in a state of being high in curvature, it is in point contact with the semiconductor element 105 at the vertex of the solder 106. Thereafter, the solder 106 is gradually wetted and spread from the center part to the peripheral part and from the first region 301 to the second region 302 while the semiconductor element 105 is pressed against the solder 106. At this time, since the solder 106 wets and spreads while discharging air, generation of voids can be suppressed.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR PREPARING THE SAME
A semiconductor package structure includes a first semiconductor wafer including a first bonding pad. The semiconductor package structure also includes a second semiconductor wafer including a second bonding pad and a third bonding pad. The second bonding pad and the third bonding pad are bonded to the first bonding pad of the first semiconductor wafer. The semiconductor package structure further includes a first via penetrating through the second semiconductor wafer to physically contact the first bonding pad of the first semiconductor wafer. A portion of the first via is disposed between the second bonding pad and the third bonding pad.
Preform diffusion soldering
A method of joining a semiconductor die to a substrate includes: applying a solder preform to a metal region of the semiconductor die or to a metal region of the substrate, the solder preform having a maximum thickness of 30 μm and a lower melting point than both metal regions; forming a soldered joint between the metal region of the semiconductor die and the metal region of the substrate via a diffusion soldering process and without applying pressure directly to the die; and setting a soldering temperature of the diffusion soldering process so that the solder preform melts and fully reacts with the metal region of the semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the entire soldered joint, each intermetallic phase having a melting point above the melting point of the preform and the soldering temperature.
Preform diffusion soldering
A method of joining a semiconductor die to a substrate includes: applying a solder preform to a metal region of the semiconductor die or to a metal region of the substrate, the solder preform having a maximum thickness of 30 μm and a lower melting point than both metal regions; forming a soldered joint between the metal region of the semiconductor die and the metal region of the substrate via a diffusion soldering process and without applying pressure directly to the die; and setting a soldering temperature of the diffusion soldering process so that the solder preform melts and fully reacts with the metal region of the semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the entire soldered joint, each intermetallic phase having a melting point above the melting point of the preform and the soldering temperature.
Thermocompression bonding of electronic components
A method for producing an electronic module includes providing a first substrate including at least one first electrical contacting surface, an electronic component including at least one second electrical contacting surface, and a first material layer made of a thermoplastic material including at least one recess extending through the material layer. The first substrate, the electronic component and the first material layer are arranged with the first material layer disposed between the first substrate and the electronic component, and the at least one first electrical contacting surface, the at least one second electrical contacting surface and the at least one recess aligned relative to one another. The first substrate, the electronic component and the material layer are thermocompression bonded. A joint formed between the at least one first electrical contacting surface and the at least one second electrical contacting surface is surrounded or enclosed by the first material layer.