H01L2224/32113

PACKAGED STRUCTURE AND FORMING METHOD THEREOF
20210366798 · 2021-11-25 ·

A packaged structure and a forming method thereof are provided. The packaged structure includes: a substrate having a first surface and a second surface opposite to each other, the first surface including at least one strip-shaped groove having two ends extending to edges of the substrate and open to the exterior, with a depth less than the thickness of the substrate; a chip fastened onto the first surface in a flipping manner and electrically connected to the substrate, and at least partially located within the projection of the chip on the substrate; a bottom filling layer filling the gap between the chip and the first surface; and a plastic packaging layer covering the bottom filling layer and packaging the chip. The packaged structure effectively removes the gas inside the packaged structure in the injection molding process without affecting the connection area on the back surface of the substrate.

PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
20220320063 · 2022-10-06 · ·

A package structure and a manufacturing thereof are provided. The package structure includes a base, a chip, a control element and an underfill. The chip is disposed on the base and includes a recess, and the recess has a bottom surface and a sidewall. The control element is disposed between the base and the chip and disposed on the bottom surface of the recess, and a gap exists between the control element and the sidewall of the recess. The underfill is disposed in the recess. The chip and the control element are electrically connected to the base respectively.

Integrated fan-out package and method of fabricating the same

An integrated fan-out package including a die attach film, an integrated circuit component, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit component is disposed on the die attach film and includes a plurality of conductive terminals. The die attach film includes an uplifted edge which raises toward sidewalls of the integrated circuit component. The insulating encapsulation encapsulates the uplifted edge and the integrated circuit component. The redistribution circuit structure is disposed on the integrated circuit component and the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals of the integrated circuit component. A method of fabricating the integrated fan-out package are also provided.

Micro device arrangement in donor substrate
11854783 · 2023-12-26 · ·

This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted pads and the non-interfering area in the donor substrate is maximized. This enables to transfer the devices to receiver substrate with fewer steps.

INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING THE SAME

An integrated fan-out package including a die attach film, an integrated circuit component, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit component is disposed on the die attach film and includes a plurality of conductive terminals. The die attach film includes an uplifted edge which raises toward sidewalls of the integrated circuit component. The insulating encapsulation encapsulates the uplifted edge and the integrated circuit component. The redistribution circuit structure is disposed on the integrated circuit component and the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals of the integrated circuit component. A method of fabricating the integrated fan-out package are also provided.

Integrated fan-out package and method of fabricating the same

An integrated fan-out package including a die attach film, an integrated circuit component, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit component is disposed on the die attach film and includes a plurality of conductive terminals. The die attach film includes an uplifted edge which raises toward sidewalls of the integrated circuit component. The insulating encapsulation encapsulates the uplifted edge and the integrated circuit component. The redistribution circuit structure is disposed on the integrated circuit component and the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals of the integrated circuit component. A method of fabricating the integrated fan-out package are also provided.

Semiconductor Arrangement and Method for Producing the Same
20200266171 · 2020-08-20 ·

A semiconductor arrangement includes a semiconductor substrate having a dielectric insulation layer and at least a first metallization layer arranged on a first side of the dielectric insulation layer. The first metallization layer includes at least two sections, each section being separated from a neighboring section by a recess. A semiconductor body is arranged on one of the sections of the first metallization layer. At least one indentation is arranged between a first side of the semiconductor body and a closest edge of the respective section of the first metallization layer. A distance between the first side and the closest edge of the section of the first metallization layer is between 0.5 mm and 5 mm.

Micro Device Arrangement in Donor Substrate
20200083083 · 2020-03-12 · ·

This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted pads and the non-interfering area in the donor substrate is maximized. This enables to transfer the devices to receiver substrate with fewer steps.

Micro device arrangement in donor substrate
10535546 · 2020-01-14 · ·

This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted pads and the non-interfering area in the donor substrate is maximized. This enables to have transfer the devices to receiver substrate with fewer steps.

MICRO DEVICE ARRANGEMENT IN DONOR SUBSTRATE
20240096684 · 2024-03-21 · ·

This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted pads and the non-interfering area in the donor substrate is maximized. This enables to transfer the devices to receiver substrate with fewer steps.