A radar device includes: a substrate including multiple high-frequency conductor layers arranged on a front surface; a semiconductor component in contact with the high-frequency conductor layers via conductive members; and an adhesive that bonds the semiconductor component to the front surface of the substrate. The semiconductor component has a bottom surface and a first side surface facing in a first direction. All the multiple high-frequency conductor layers include at least high-frequency conductor layers bending in a plane of the front surface and thereby extend, on the front surface, from inside ends facing the bottom surface to outside ends positioned in the first direction from the first side surface. The adhesive is in contact with the front surface except for the sites of the multiple high-frequency conductor layers formed and in contact with the side surfaces of the semiconductor component.

A method of forming a semiconductor device includes attaching a semiconductor die to a flag of a leadframe and forming a conductive connector over a portion of the semiconductor die and a portion of the flag. A conductive connection between a first bond pad of the semiconductor die and the flag is formed by way of the conductive connector. A second bond pad of the semiconductor die is connected to a conductive lead of the plurality by way of a bond wire.

Disclosed is a semiconductor package. The semiconductor package includes a substrate including an opening, a first semiconductor chip, disposed on the substrate, including a plurality of first chip pads exposed through the opening, a second semiconductor chip, disposed on the first semiconductor chip to partially overlap with the first semiconductor chip, including a plurality of second chip pads, aligned with the opening, and a redistribution layer formed on a surface on which the second chip pads of the second semiconductor chip are disposed. One or more of the second chip pads overlaps with the first semiconductor chip and is covered by the first semiconductor chip and with the remaining pads of the second chip pads being exposed through the opening. The redistribution layer includes redistribution pads, exposed through the opening, and includes redistribution lines, configured to connect the one or more of the second chip pads to the redistribution pads.

A chip-on film and a display device including the same are disclosed. The chip-on film includes a first base film, a second base film positioned on the first base film, a film pad portion positioned on at least one side of the second base film and exposed to the outside of the first base film, and a coating layer positioned on one surface of the first base film.

Disclosed is a semiconductor package. The semiconductor package includes a substrate including an opening, a first semiconductor chip, disposed on the substrate, including a plurality of first chip pads exposed through the opening, a second semiconductor chip, disposed on the first semiconductor chip to partially overlap with the first semiconductor chip, including a plurality of second chip pads, aligned with the opening, and a redistribution layer formed on a surface on which the second chip pads of the second semiconductor chip are disposed. One or more of the second chip pads overlaps with the first semiconductor chip and is covered by the first semiconductor chip and with the remaining pads of the second chip pads being exposed through the opening. The redistribution layer includes redistribution pads, exposed through the opening, and includes redistribution lines, configured to connect the one or more of the second chip pads to the redistribution pads.

The present invention provides an image capturing module and a portable electronic device. An image capturing module includes a circuit substrate, an image sensing chip, a filter element, and a lens assembly. The circuit substrate has an upper surface, a lower surface, and a through opening. The image sensing chip is placed on the lower surface of the circuit substrate and below the through opening. The filter element is placed on the upper surface of the circuit substrate and above the through opening. The lens assembly includes a holding structure and a lens structure. The lower surface of the circuit substrate includes a first solder area, a second solder area, and a first solderless area. The upper surface of the image sensing chip includes an image sensing area, a first conductive area, a second conductive area, and a first non-conductive area.

A semiconductor package is disclosed. The semiconductor package comprises a lower package including a first substrate and a semiconductor chip on the first substrate, a second substrate on the lower package, interconnect terminals between the first substrate and the second substrate, and an adhesive pattern between a top surface of the semiconductor chip and a bottom surface of the second substrate. The adhesive pattern extends along an edge of the semiconductor chip. The adhesive pattern exposes a top surface of a central zone of the semiconductor chip.

A chip-on film and a display device including the same are disclosed. The chip-on film includes a first base film, a second base film positioned on the first base film, a film pad portion positioned on at least one side of the second base film and exposed to the outside of the first base film, and a coating layer positioned on one surface of the first base film.

A semiconductor package is disclosed. The semiconductor package comprises a lower package including a first substrate and a semiconductor chip on the first substrate, a second substrate on the lower package, interconnect terminals between the first substrate and the second substrate, and an adhesive pattern between a top surface of the semiconductor chip and a bottom surface of the second substrate. The adhesive pattern extends along an edge of the semiconductor chip. The adhesive pattern exposes a top surface of a central zone of the semiconductor chip.

An embodiment is a structure comprising a package, a substrate, and external electrical connectors mechanically and electrically coupling the package to the substrate. The package contains a die. The external electrical connectors are between the package and the substrate. An underfill material is around a periphery region of the package and between the periphery region and the substrate. A gap is between a central region of the package and the substrate, and does not contain the underfill material. The underfill material may seal the gap. The gap may be an air gap. In some embodiments, the underfill material may fill greater than or equal to 10 percent and no more than 70 percent of a volume between the package and the substrate.