A semiconductor integrated circuit chip, in which multi-core processors are integrated, is usually mounted over an organic wiring board by FC bonding to form a BGA package by being integrated with the substrate. In such a structure, power consumption is increased, and hence the power supplied only from a peripheral portion of the chip is insufficient, so that a power supply pad is also provided in the chip central portion. However, because of an increase in the wiring associated with the integration of a plurality of CPU cores, etc., there occurs a portion between the peripheral portion and the central portion of the chip, where a power supply pad cannot be arranged. According to the outline of the present application, in a semiconductor integrated circuit device such as a BGA, etc., in which a semiconductor chip is mounted over an interposer, such as a multilayer organic wiring board, in a face-up manner, a first group of metal through electrodes, which are provided in the semiconductor chip to supply a power supply potential to a core circuit, etc., and a first metal land over the interposer are interconnected by a first conductive adhesive member film.

A chip module includes a chip having a front side and a rear side, a chip carrier having an upper side facing the chip, a contact layer formed of an electrically conductive material and arranged on the upper side of the chip carrier between the rear side of the chip and the upper side of the chip carrier, and an electrically conductive adhesive arranged on an upper side of the contact layer facing the chip. The electrically conductive adhesive connects the upper side of the contact layer and the rear side of the chip. The contact layer has a plurality of regions electrically insulated from each other and each electrically connected to the chip by the electrically conductive adhesive.

An integrated passive device (IPD) comprises a conductive substrate having a front side and a back side and a plurality of layers including front and back dielectric layers and front and back conductive polymer layers, the plurality of layers defining front and back isolation trenches revealing the front and back sides of the substrate. The IPD may comprise a first metal contact electrically connected to the substrate by way of a blind via defined from a front outer surface of the IPD to the front side of the substrate and positioned within the front isolation trench. The IPD may comprise a second metal contact electrically isolated from the first and electrically connected to the polymer layers, connection to the back polymer layer being by way of a through via defined from the front surface to a back surface of the IPD and positioned within the front and back isolation trenches.

A semiconductor device includes a plurality of power semiconductor elements and a control chip including a plurality of terminals including a first terminal and a plurality of second terminals and configured to control the plurality of power semiconductor elements, using power supply voltage supplied to the plurality of second terminals. The semiconductor device also includes a first conductor for supplying a predetermined control voltage to the first terminal, a plurality of first wirings individually connected to the plurality of second terminals and for supplying the power supply voltage to the plurality of the second terminals, a die pad on which the control chip is arranged, and a semiconductor chip including a diode used for bootstrap operation to generate the power supply voltage. The semiconductor chip is fixed to the die pad by an insulating material. The die pad is connected to a terminal to which a reference voltage is supplied.

A semiconductor integrated circuit chip, in which multi-core processors are integrated, is usually mounted over an organic wiring board by FC bonding to form a BGA package by being integrated with the substrate. In such a structure, power consumption is increased, and hence the power supplied only from a peripheral portion of the chip is insufficient, so that a power supply pad is also provided in the chip central portion. However, because of an increase in the wiring associated with the integration of a plurality of CPU cores, etc., there occurs a portion between the peripheral portion and the central portion of the chip, where a power supply pad cannot be arranged. According to the outline of the present application, in a semiconductor integrated circuit device such as a BGA, etc., in which a semiconductor chip is mounted over an interposer, such as a multilayer organic wiring board, in a face-up manner, a first group of metal through electrodes, which are provided in the semiconductor chip to supply a power supply potential to a core circuit, etc., and a first metal land over the interposer are interconnected by a first conductive adhesive member film.

A semiconductor integrated circuit chip, in which multi-core processors are integrated, is usually mounted over an organic wiring board by FC bonding to form a BGA package by being integrated with the substrate. In such a structure, power consumption is increased, and hence the power supplied only from a peripheral portion of the chip is insufficient, so that a power supply pad is also provided in the chip central portion. However, because of an increase in the wiring associated with the integration of a plurality of CPU cores, etc., there occurs a portion between the peripheral portion and the central portion of the chip, where a power supply pad cannot be arranged. According to the outline of the present application, in a semiconductor integrated circuit device such as a BGA, etc., in which a semiconductor chip is mounted over an interposer, such as a multilayer organic wiring board, in a face-up manner, a first group of metal through electrodes, which are provided in the semiconductor chip to supply a power supply potential to a core circuit, etc., and a first metal land over the interposer are interconnected by a first conductive adhesive member film.