In an embodiment, a semiconductor module includes a low side switch and a high side switch. The low side switch and the high side switch are arranged laterally adjacent one another and coupled in series between a ground package pad and a voltage input (VIN) package pad of the semiconductor module and form a half bridge configuration having an output node. The semiconductor module further includes a first capacitor pad coupled to ground potential and a second capacitor pad coupled to a VIN potential. The first capacitor pad is arranged vertically above the low side switch and the second capacitor pad is arranged vertically above the high side switch.

A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 μm, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.

A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 μm, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.

An electronic device including a die and at least one lead. The electronic device further includes a corresponding at least one connector, each connector for connecting the die to a corresponding lead or leads, and each connector having a first end disposed in bondable proximity to a complementary surface of the corresponding lead and a second end disposed in bondable proximity to a complementary surface of the die. An end portion of at least one of the first end and second end has a formation, the formation in combination with the complementary surface of one, or both, of the respective lead or the die defining therebetween a first region and at least a second region configured to attract by capillary action an electrically conductive bonding material to consolidate therein.

A semiconductor device includes a semiconductor element, a lead frame, a bridge member, and a sealing resin. The semiconductor element has first and second surfaces opposite from each other, and has first and second electrodes respectively exposed on the first and second surfaces. The lead frame includes a mounting portion and a non-mounting portion divided from the mounting portion. The mounting portion has a mounting surface to which the semiconductor element is mounted and the first electrode is electrically connected, and an opposite surface opposite from the mounting surface. The bridge member electrically connects the second electrode and the non-mounting portion. The sealing resin has electric insulation, has a thermal conductivity of 2.2 W or more, and covers the semiconductor element, the lead frame, and the bridge member in a state where the opposite surface of the mounting portion is exposed from the sealing resin.

An electronic device including a die and at least one lead. The electronic device further includes a corresponding at least one connector, each connector for connecting the die to a corresponding lead or leads, and each connector having a first end disposed in bondable proximity to a complementary surface of the corresponding lead and a second end disposed in bondable proximity to a complementary surface of the die. An end portion of at least one of the first end and second end has a formation, the formation in combination with the complementary surface of one, or both, of the respective lead or the die defining therebetween a first region and at least a second region configured to attract by capillary action an electrically conductive bonding material to consolidate therein.

A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 ?m, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.

A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 ?m, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.

A semiconductor device comprises: a substrate having a set of conductive patterns; a semiconductor die mounted on the substrate, wherein the semiconductor die has on its top surface a set of bonding pads; and a conductive bar assembly for electrically connecting the set of conductive patterns of the substrate with the set of bonding pads of the semiconductor die, wherein the conductive bar assembly comprises: an insulating body; and a set of conductive bars extending within the insulating body, wherein the set of conductive bars have a set of first ends exposed from a first surface of the insulating body to be electrically connected to the set of conductive patterns of the substrate and a set of second ends exposed from a second surface of the insulating body to be electrically connected to the set of bonding pads of the semiconductor die.

A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 m, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.