H01L2224/4118

Semiconductor packages and methods of packaging semiconductor devices

An embodiment related to a device. The device includes a first die with first and second die surfaces. The second die surface is bonded to a first die attach pad (DAP) disposed on a first substrate surface of a package substrate and the first die surface includes a first die contact pad. The device also includes a first clip bond including a first clip bond horizontal planar portion attached to the first die contact pad on the first die surface, and a first clip bond vertical portion disposed on an edge of the first clip bond horizontal planar portion. The first clip bond vertical portion is attached to a first substrate bond pad on the first substrate surface. The device further includes a first conductive clip-die bonding layer with spacers on the first die contact pad of the first die. The first conductive clip-die bonding layer bonds the first clip bond horizontal planar portion to the first die contact pad, and the spacers maintain a uniform Bond Line Thickness (BLT) of the first conductive clip-die bonding layer.

CONNECTING STRIP FOR DISCRETE AND POWER ELECTRONIC DEVICES
20220320032 · 2022-10-06 · ·

A connecting strip of conductive elastic material having an arched shape having a concave side and a convex side. The connecting strip is fixed at the ends to a support carrying a die with the convex side facing the support. During bonding, the connecting strip undergoes elastic deformation and presses against the die, thus electrically connecting the at least one die to the support.

Stacked die power converter

A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor switch (first power transistor) attached to the die pad, and a first metal clip attached to one side of the first die. The first metal clip is coupled to at least one package pin. A second die including a second power transistor switch (second power transistor) is attached to another side on the first metal clip. A controller is provided by a controller die attached to a non-conductive layer on the second metal clip on one side of the second die.

Packaging solutions for devices and systems comprising lateral GaN power transistors

Packaging solutions for devices and systems comprising lateral GaN power transistors are disclosed, including components of a packaging assembly, a semiconductor device structure, and a method of fabrication thereof. In the packaging assembly, a GaN die, comprising one or more lateral GaN power transistors, is sandwiched between first and second leadframe layers, and interconnected using low inductance interconnections, without wirebonding. For thermal dissipation, the dual leadframe package assembly can be configured for either front-side or back-side cooling. Preferred embodiments facilitate alignment and registration of high current/low inductance interconnects for lateral GaN devices, in which contact areas or pads for source, drain and gate contacts are provided on the front-side of the GaN die. By eliminating wirebonding, and using low inductance interconnections with high electrical and thermal conductivity, PQFN technology can be adapted for packaging GaN die comprising one or more lateral GaN power transistors.

Semiconductor Device and Method of Forming Leadframe with Clip Bond for Electrical Interconnect

A semiconductor device has a leadframe and a first electrical component including a first surface disposed on the leadframe. A first clip bond is disposed over a second surface of the first electrical component. The first clip bond extends vertically through the semiconductor device. The first clip bond has a vertical member, horizontal member connected to the vertical member, die contact integrated with the horizontal member, and clip foot extending from the vertical member. A second electrical component has a first surface disposed on the first clip bond. A second clip bond is disposed over a second surface of the second electrical component opposite the first surface of the second electrical component. An encapsulant is deposited around the first electrical component and first clip bond. A second electrical component is disposed over the encapsulant. The clip foot is exposed from the encapsulant.

SEMICONDUCTOR PACKAGES WITH VERTICAL PASSIVE COMPONENTS

An embodiment related to a package is disclosed. The package includes a component mounted to a die attach region on a package substrate. A passive component with first and second passive component terminals is vertically attached to the package substrate. An encapsulant is disposed over the package substrate to encapsulate the package. In one embodiment, an external component is stacked above the encapsulant and is electrically coupled to the encapsulated package.

Electronic module

An electronic module has a first substrate 11; a second substrate 21 provided in one side of the first substrate 11; and a chip module 100 provided between the first substrate 11 and the second substrate 21. The chip module 100 has an electronic element 13, 23 and a connecting body 60, 70, 80 electrically connected to the electronic element 13, 23. The electronic element 13, 23 extends along a first direction that is a thickness direction of the electronic module.

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

An embodiment related to a device. The device includes a first die with first and second die surfaces. The second die surface is bonded to a first die attach pad (DAP) disposed on a first substrate surface of a package substrate and the first die surface includes a first die contact pad. The device also includes a first clip bond including a first clip bond horizontal planar portion attached to the first die contact pad on the first die surface, and a first clip bond vertical portion disposed on an edge of the first clip bond horizontal planar portion. The first clip bond vertical portion is attached to a first substrate bond pad on the first substrate surface. The device further includes a first conductive clip-die bonding layer with spacers on the first die contact pad of the first die. The first conductive clip-die bonding layer bonds the first clip bond horizontal planar portion to the first die contact pad, and the spacers maintain a uniform Bond Line Thickness (BLT) of the first conductive clip-die bonding layer.

Semiconductor package with solder standoff

A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.

SEMICONDUCTOR PACKAGE WITH SOLDER STANDOFF

A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.