H01L2224/4321

SILVER BONDING WIRE AND METHOD OF MANUFACTURING THE SAME

A bonding wire and a method of manufacturing the bonding wire are provided. The bonding wire contains 90.0 to 99.0 wt % of silver (Ag); 0.2 to 2.0 wt % of gold (Au); 0.2 to 4.0 wt % of palladium (Pd), platinum (Pt), rhodium (Rh), or a combination thereof; 10 to 1000 ppm of dopants; and inevitable impurities. In the wire, the ratio of (a)/(b) is 3 to 5, in which (a) represents the amount of crystal grains having <100> orientation in crystalline orientations <hkl> in a wire lengthwise direction and (b) represents the amount of crystal grains having <111> orientation in crystalline orientations <hkl> in the wire lengthwise direction.

SILVER BONDING WIRE AND METHOD OF MANUFACTURING THE SAME

A bonding wire and a method of manufacturing the bonding wire are provided. The bonding wire contains 90.0 to 99.0 wt % of silver (Ag); 0.2 to 2.0 wt % of gold (Au); 0.2 to 4.0 wt % of palladium (Pd), platinum (Pt), rhodium (Rh), or a combination thereof; 10 to 1000 ppm of dopants; and inevitable impurities. In the wire, the ratio of (a)/(b) is 3 to 5, in which (a) represents the amount of crystal grains having <100> orientation in crystalline orientations <hkl> in a wire lengthwise direction and (b) represents the amount of crystal grains having <111> orientation in crystalline orientations <hkl> in the wire lengthwise direction.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
20220238490 · 2022-07-28 · ·

A semiconductor device includes a first wiring substrate having a first surface and a second surface opposite to the first surface, and including a plurality of first electrode pads on the first surface, and a second wiring substrate having a third surface facing the first surface and a fourth surface opposite to the third surface, and including a plurality of second electrode pads on the third surface. A plurality of first semiconductor chips are stacked between the first surface and the third surface. A first columnar electrode extends in an oblique direction with respect to a first direction substantially perpendicular to the first surface and the third surface, and connects between the plurality of first electrode pads and the plurality of second electrode pads. A first resin layer covers the plurality of first semiconductor chips and the first columnar electrode between the first surface and the third surface.

Bonding wire for semiconductor device

Provided is a Pd coated Cu bonding wire for a semiconductor device capable of sufficiently obtaining bonding reliability of a ball bonded portion in a high temperature environment of 175° C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases. The bonding wire for a semiconductor device comprises a Cu alloy core material; and a Pd coating layer formed on a surface of the Cu alloy core material; and contains 0.03 to 2% by mass in total of one or more elements selected from Ni, Rh, Ir and Pd in the bonding wire and further 0.002 to 3% by mass in total of one or more elements selected from Li, Sb, Fe, Cr, Co, Zn, Ca, Mg, Pt, Sc and Y. The bonding wire can be sufficiently obtained bonding reliability of a ball bonded portion in a high temperature environment of 175° C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases by being used.

BONDING WIRE

There is provided a metal-coated Al bonding wire which can provide a sufficient bonding reliability of bonded parts of the bonding wire under a high temperature state where a semiconductor device using the metal-coated Al bonding wire is operated. The bonding wire includes a core wire of Al or Al alloy, and a coating layer of Ag, Au or an alloy containing them formed on the outer periphery of the core wire, and the bonding wire is characterized in that when measuring crystal orientations on a cross-section of the core wire in a direction perpendicular to a wire axis of the bonding wire, a crystal orientation <111> angled at 15 degrees or less to a wire longitudinal direction has a proportion of 30 to 90% among crystal orientations in the wire longitudinal direction. Preferably, the surface roughness of the wire is 2 μm or less in terms of Rz.

Bonding wire for semiconductor devices

There is provided a novel Cu bonding wire that achieves a favorable FAB shape and reduces a galvanic corrosion in a high-temperature environment to achieve a favorable bond reliability of the 2nd bonding part. The bonding wire for semiconductor devices includes a core material of Cu or Cu alloy, and a coating layer having a total concentration of Pd and Ni of 90 atomic % or more formed on a surface of the core material. The bonding wire is characterized in that: in a concentration profile in a depth direction of the wire obtained by performing measurement using Auger electron spectroscopy (AES) so that the number of measurement points in the depth direction is 50 or more for the coating layer, a thickness of the coating layer is 10 nm or more and 130 nm or less, an average value X is 0.2 or more and 35.0 or less where X is defined as an average value of a ratio of a Pd concentration C.sub.Pd (atomic %) to an Ni concentration C.sub.Ni (atomic %), C.sub.Pd/C.sub.Ni, for all measurement points in the coating layer, and the total number of measurement points in the coating layer whose absolute deviation from the average value X is 0.3X or less is 50% or more relative to the total number of measurement points in the coating layer.

PALLADIUM-COATED COPPER BONDING WIRE, MANUFACTURING METHOD OF PALLADIUM-COATED COPPER BONDING WIRE, SEMICONDUCTOR DEVICE USING THE SAME, AND MANUFACTURING METHOD THEREOF

A palladium-coated copper bonding wire includes: a core material containing copper as a main component; and a palladium layer on the core material, in which a concentration of palladium relative to the entire wire is 1.0 mass % or more and 4.0 mass % or less, and a work hardening coefficient in an amount of change of an elongation rate 2% or more and a maximum elongation rate εmax % or less of the wire, is 0.20 or less.

BONDING WIRE FOR SEMICONDUCTOR DEVICES
20230335528 · 2023-10-19 ·

There is provided a novel Cu bonding wire that achieves a favorable FAB shape and reduces a galvanic corrosion in a high-temperature environment to achieve a favorable bond reliability of the 2nd bonding part. The bonding wire for semiconductor devices includes a core material of Cu or Cu alloy, and a coating layer having a total concentration of Pd and Ni of 90 atomic % or more formed on a surface of the core material. The bonding wire is characterized in that: in a concentration profile in a depth direction of the wire obtained by performing measurement using Auger electron spectroscopy (AES) so that the number of measurement points in the depth direction is 50 or more for the coating layer, a thickness of the coating layer is 10 nm or more and 130 nm or less, an average value X is 0.2 or more and 35.0 or less where X is defined as an average value of a ratio of a Pd concentration C.sub.Pd (atomic %) to an Ni concentration C.sub.Ni (atomic %), C.sub.Pd/C.sub.Ni, for all measurement points in the coating layer, and the total number of measurement points in the coating layer whose absolute deviation from the average value X is 0.3× or less is 50% or more relative to the total number of measurement points in the coating layer.

Bonding wire for semiconductor devices

The present invention has as its object the provision of a bonding wire for semiconductor devices mainly comprised of Ag, in which bonding wire for semiconductor devices, the bond reliability demanded for high density mounting is secured and simultaneously a sufficient, stable bond strength is realized at a ball bond, no neck damage occurs even in a low loop, the leaning characteristic is excellent, and the FAB shape is excellent. To solve this problem, the bonding wire for semiconductor devices according to the present invention contains one or more of Be, B, P, Ca, Y, La, and Ce in a total of 0.031 at % to obtain a 0.180 at %, further contains one or more of In, Ga, and Cd in a total of 0.05 at % to 5.00 at %, and has a balance of Ag and unavoidable impurities. Due to this, it is possible to obtain a bonding wire for semiconductor devices sufficiently forming an intermetallic compound layer at a ball bond interface to secure the bond strength of the ball bond, not causing neck damage even in a low loop, having a good leaning characteristic, and having a good FAB shape.

BONDING WIRE FOR SEMICONDUCTOR DEVICES

Bonding wire for semiconductor devices contains one or more of Be, B, P, Ca, Y, La, and Ce in a total of 0.031 at % to obtain a 0.180 at %, further contains one or more of In, Ga, and Cd in a total of 0.05 at % to 5.00 at %, and has a balance of Ag and unavoidable impurities. Due to this, it is possible to obtain a bonding wire for semiconductor devices sufficiently forming an intermetallic compound layer at a ball bond interface to secure the bond strength of the ball bond, not causing neck damage even in a low loop, having a good leaning characteristic, and having a good FAB shape.