H01L2224/75001

Die attach systems including a verification substrate
11574832 · 2023-02-07 · ·

A die attach system is provided. The die attach system includes a verification substrate configured to receive a plurality of die, the verification substrate including a plurality of substrate reference markers. The die attach system also includes an imaging system for determining an alignment of the plurality of die with the verification substrate by imaging each of the plurality of die with respective ones of the plurality of substrate reference markers.

DIE ATTACH SYSTEMS, AND METHODS FOR INTEGRATED ACCURACY VERIFICATION AND CALIBRATION USING SUCH SYSTEMS
20230148420 · 2023-05-11 ·

A die attach system is provided. The die attach system includes a verification substrate configured to receive a plurality of die, the verification substrate including a plurality of substrate reference markers. The die attach system also includes an imaging system for determining an alignment of the plurality of die with the verification substrate by imaging each of the plurality of die with respective ones of the plurality of substrate reference markers.

METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
20230187285 · 2023-06-15 ·

A method of manufacturing a semiconductor package includes estimating an error in a solder ball attaching process, determining a specification of a ball tool and a method of the solder ball attaching process, based on the estimated error, manufacturing the ball tool according to the determined specification thereof, and performing the solder ball attaching process based on the method of the solder ball attaching process. The determining of the specification of the ball tool and the method of the solder ball attaching process includes determining a number of a plurality of holders in the ball tool and a position and a width of each of the plurality of holders, determining a number of a plurality of working regions of a substrate and a position and a width of each of the plurality of working regions, and dividing a substrate into the plurality of working regions.

Substrate bonding apparatus, manufacturing system, and semiconductor device manufacturing method
11776931 · 2023-10-03 · ·

According to one embodiment, there is provided a substrate bonding apparatus including a first chucking stage, a second chucking stage, and an alignment unit. The first chucking stage is configured to chuck a first substrate. The second chucking stage is disposed facing the first chucking stage. The second chucking stage is configured to chuck a second substrate. The alignment unit is configured to be inserted between the first chucking stage and the second chucking stage. The alignment unit includes a base body, a first detection element, and a second detection element. The base body includes a first main face and a second main face opposite to the first main face. The first detection element is disposed on the first main face. The second detection element is disposed on the second main face.

COMPRESSION SYSTEM CALIBRATION

A method to aid in a calibration of a compression system includes mounting a first substrate in a press. The press has calibration parameters, and the first substrate has a test film on a first surface. The method includes mounting a second substrate in the press. The second substrate has spikes arranged in a spike pattern on a second surface. The method includes compressing the first substrate and the second substrate together with a force that causes the spikes to form indentations in the test film, separating the first substrate from the second substrate, determining local pressures applied by the spikes against the test film, and adjusting one or more calibration parameters of the press in response to the local pressures.

Warpage-compensated bonded structure including a support chip and a three-dimensional memory chip

A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration.

SUBSTRATE BONDING APPARATUS, MANUFACTURING SYSTEM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
20210074670 · 2021-03-11 · ·

According to one embodiment, there is provided a substrate bonding apparatus including a first chucking stage, a second chucking stage, and an alignment unit. The first chucking stage is configured to chuck a first substrate. The second chucking stage is disposed facing the first chucking stage. The second chucking stage is configured to chuck a second substrate. The alignment unit is configured to be inserted between the first chucking stage and the second chucking stage. The alignment unit includes a base body, a first detection element, and a second detection element. The base body includes a first main face and a second main face opposite to the first main face. The first detection element is disposed on the first main face. The second detection element is disposed on the second main face.

WARPAGE-COMPENSATED BONDED STRUCTURE INCLUDING A SUPPORT CHIP AND A THREE-DIMENSIONAL MEMORY CHIP

A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration.

DIE ATTACH SYSTEMS, AND METHODS FOR INTEGRATED ACCURACY VERIFICATION AND CALIBRATION USING SUCH SYSTEMS
20200075381 · 2020-03-05 ·

A die attach system is provided. The die attach system includes a verification substrate configured to receive a plurality of die, the verification substrate including a plurality of substrate reference markers. The die attach system also includes an imaging system for determining an alignment of the plurality of die with the verification substrate by imaging each of the plurality of die with respective ones of the plurality of substrate reference markers.

METHOD FOR PANEL-LEVEL THERMO-COMPRESSION BONDING
20240186281 · 2024-06-06 ·

The present disclosure is directed to a thermocompression bonding tool having a bond head with a surface for compression and heating and a sensor, a stage for compression and heating, and a controller, and a method for its use for chip gap height and alignment control. For chip gap height and alignment control, the controller is provided with a recipe displacement and temperature profile and measured offsets.