A composite assembly of three stacked joining partners, and a corresponding method. The three stacked joining partners are materially bonded to one another by an upper solder layer and a lower solder layer. An upper joining partner and a lower joining partner are fixed in their height and have a specified distance from one another. The upper solder layer is fashioned from a first solder agent, having a first melt temperature, between the upper joining partner and a middle joining partner. The second solder layer is fashioned from a second solder agent, having a higher, second melt temperature, between the middle joining partner and the lower joining partner. The upper joining partner has an upwardly open solder compensating opening filled with the first solder agent, from which, to fill the gap between the upper joining partner and the middle joining partner, the first solder agent subsequently flows into the gap.

A chip transfer apparatus includes: a chip storage module in which a plurality of micro-semiconductor chips and a suspension including impurities are stored; a chip filtration module separating a first suspension including the plurality of micro-semiconductor chips and a second suspension including the impurities in the suspension; and a chip supply module configured to supply the first suspension onto the transfer substrate such that the first suspension is introduced from the chip filtration module and the plurality of micro-semiconductor chips are flowable on the transfer substrate.

An industrial-scale system and method for handling precisely aligned and centered semiconductor substrate (e.g., wafer) pairs for substrate-to-substrate (e.g., wafer-to-wafer) aligning and bonding applications is provided. Some embodiments include an aligned substrate transport device having a frame member and a spacer assembly. The centered semiconductor substrate pairs may be positioned within a processing system using the aligned substrate transport device, optionally under robotic control. The centered semiconductor substrate pairs may be bonded together without the presence of the aligned substrate transport device in the bonding device. The bonding device may include a second spacer assembly which operates in concert with that of the aligned substrate transport device to perform a spacer hand-off between the substrates. A pin apparatus may be used to stake the substrates during the hand-off.

An industrial-scale system and method for handling precisely aligned and centered semiconductor substrate (e.g., wafer) pairs for substrate-to-substrate (e.g., wafer-to-wafer) aligning and bonding applications is provided. Some embodiments include an aligned substrate transport device having a frame member and a spacer assembly. The centered semiconductor substrate pairs may be positioned within a processing system using the aligned substrate transport device, optionally under robotic control. The centered semiconductor substrate pairs may be bonded together without the presence of the aligned substrate transport device in the bonding device. The bonding device may include a second spacer assembly which operates in concert with that of the aligned substrate transport device to perform a spacer hand-off between the substrates. A pin apparatus may be used to stake the substrates during the hand-off.

A method of manufacturing a chip module comprises a step of disposing a first electronic element 13 on a first jig 500, a step of disposing a first connector 60 on the first electronic element 13 via a conductive adhesive 5, a step of disposing a second electronic element 23 on the first connector 60 via a conductive adhesive 5, a step of disposing a second connector 70 on a second jig 550, a step of reversing the second jig in a state where the second connector 70 is fixed to the second jig 550 and disposing the second connector 70 on the second electronic element 23 via a conductive adhesive 5, and a step of curing the conductive adhesives 5.

A light emitting diode chip mounting apparatus includes a guide plate including a first surface and a second surface opposite to the first surface, the second surface including at least one first tunnel that extends in a first direction, wherein the first tunnel defines a concave portion and the second surface includes a convex portion adjacent to the concave portion. The first tunnel is sized to accommodate a light emitting diode chip flowing therethrough.

Tools and systems for processing semiconductor devices, and methods of processing semiconductor devices are disclosed. In some embodiments, a method of using a tool for processing semiconductor devices includes a tool with a second material disposed over a first material, and a plurality of apertures disposed within the first material and the second material. The second material comprises a higher reflectivity than the first material. Each of the apertures is adapted to retain a package component over a support during an exposure to energy.

Provided is an assembly jig set of semiconductor module having a plurality of semiconductor chips, the assembly jig set comprising: a first outer frame jig; and a plurality of inner piece jigs positioned by the first outer frame jig and each having a sectioned shape corresponding to the first outer frame jig, wherein one of the inner piece jigs has a plurality of opening portions for positioning the semiconductor chips. A manufacturing method of a semiconductor module using an assembly jig set is provided.

Method of assembly of a first element (I) and a second element (II) each having an assembly surface, at least one of the assembly surfaces comprising recessed metal portions (6, 106) surrounded by dielectric materials (4, 104) comprising: A) a step to bring the two assembly surfaces into contact without application of pressure such that direct bonding is obtained between the assembly surfaces, said first and second assemblies (I, II) forming a stack with a given thickness (e), B) a heat treatment step of said stack during which the back faces (10, 110) of the first (I) and the second (II) elements are held in position so that they are held at a fixed distance (E) between the given stack thickness+/−2 nm.

An industrial-scale system and method for handling precisely aligned and centered semiconductor substrate (e.g., wafer) pairs for substrate-to-substrate (e.g., wafer-to-wafer) aligning and bonding applications is provided. Some embodiments include an aligned substrate transport device having a frame member and a spacer assembly. The centered semiconductor substrate pairs may be positioned within a processing system using the aligned substrate transport device, optionally under robotic control. The centered semiconductor substrate pairs may be bonded together without the presence of the aligned substrate transport device in the bonding device. The bonding device may include a second spacer assembly which operates in concert with that of the aligned substrate transport device to perform a spacer hand-off between the substrates. A pin apparatus may be used to stake the substrates during the hand-off.