Patent classifications
H01L2224/78
WIRE BONDING APPARATUS, METHOD FOR MEASURING OPENING AMOUNT OF CLAMP APPARATUS, AND METHOD FOR CALIBRATING CLAMP APPARATUS
A wire bonding apparatus of an aspect includes: a clamp apparatus, having a pair of arms; a stage, moving the clamp apparatus in a horizontal direction; a rod member; a contact detection part, detecting contact between the rod member and the clamp apparatus; and a control apparatus, controlling opening and closing of the pair of arms and an operation of the stage and acquiring position information of the clamp apparatus. The control apparatus obtains an opening amount of the pair of arms based on position information of the clamp apparatus at a time when an outer side surface of a first arm contacts the rod member in a state where the pair of arms are closed and position information of the clamp apparatus at the time when the outer side surface of the first arm contacts the rod member in a state where the pair of arms are open.
METHODS OF FORMING WIRE INTERCONNECT STRUCTURES AND RELATED WIRE BONDING TOOLS
A method of forming a wire interconnect structure includes the steps of: (a) forming a wire bond at a bonding location on a substrate using a wire bonding tool; (b) extending a length of wire, continuous with the wire bond, to a position above the wire bond; (c) moving the wire bonding tool to contact the length of wire, at a position along the length of wire, to partially sever the length of wire at the position along the length of wire; and (d) separating the length of wire from a wire supply at the position along the length of wire, thereby providing a wire interconnect structure bonded to the bonding location.
Bonding apparatus
A bonding apparatus is provided. This bonding apparatus uses images captured by an imaging apparatus and performs a packaging process for a semiconductor chip and additional processes other than the packaging process. The bonding apparatus is provided with: an aperture switching mechanism provided in an optical system of the imaging apparatus and capable of switching between a first aperture and a second aperture that has an aperture hole diameter greater than that of the first aperture; and a control unit which controls the aperture switching mechanism to switch to either the first aperture or the second aperture. The control unit performs the packaging process using an image captured by switching to the first aperture and performs the additional processes using an image captured by switching to the second aperture.
Laser soldering system
A laser soldering system is disclosed. The laser soldering system has a moving system, a gripper mounted on the moving system, a presser mounted on the moving system and having a transparent member, and a laser. The gripper grips an object and places the object at a target location on a product to be soldered. The transparent member presses the object against the product. The laser emits a laser beam through the transparent member to solder the object to the target location while the object is pressed against the product.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device has a semiconductor chip having a plurality of pads and wires electrically connected to the plurality of pads, respectively. The plurality of pads includes a plurality of first pads which is electrically connected to a circuit included in the semiconductor chip and to which first wires are bonded and a second pad which is an electrode pad for wire connection test and to which a second wire is bonded.
SYSTEMS AND METHODS FOR OPTIMIZING LOOPING PARAMETERS AND LOOPING TRAJECTORIES IN THE FORMATION OF WIRE LOOPS
A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).
SYSTEMS AND METHODS FOR OPTIMIZING LOOPING PARAMETERS AND LOOPING TRAJECTORIES IN THE FORMATION OF WIRE LOOPS
A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND WIRE BONDING APPARATUS
A manufacturing method of a semiconductor device includes: a first step of, after joining a wire to an electrode using a capillary, forming a wire part by moving the capillary to a third target pointwhile feeding out the wire; a second step of forming a bent part by moving the capillary to a fourth target point while feeding out the wire; a third step of processing the bent part into a planned cut part by repeating lowering and raising of the capillary for multiple times; and a fourth step of cutting the wire at the planned cut part by raising the capillary with a wire clamper closed to form a pin wire.