A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated by particle bombardment which is configured to remove atoms of the first hybrid interface layer and atoms of the second hybrid interface layer to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.

A method for bonding a contact surface of a first substrate to a contact surface of a second substrate comprising of the steps of: positioning the first substrate on a first receiving surface of a first receiving apparatus and positioning the second substrate on a second receiving surface of a second receiving apparatus; establishing contact of the contact surfaces at a bond initiation site; and bonding the first substrate to the second substrate along a bonding wave which is travelling from the bond initiation site to the side edges of the substrates, wherein the first substrate and/or the second substrate is/are deformed for alignment of the contact surfaces.

Described herein is a die-to-wafer bonding process that utilizes micro-transfer printing to transfer die from a source wafer onto an intermediate handle wafer. The resulting intermediate handle wafer structure can then be bonded die-down onto the target wafer, followed by removal of only the intermediate handle wafer, leaving the die in place bonded to the target wafer.

A die bonding method with corner or side contact without impact force includes the steps: picking up a die by a die bonding device, wherein a surface of the die has no solder and bump; moving the die to one side of a die placement area of a substrate, wherein the substrate has no solder and bump; blowing one corner or one side of the die a positive pressure from the die bonding device to bend the corner/side to contact the die placement area; forming a bonding wave after the corner/side of the die contacting the die placement area, and spreading the bonding wave from the corner/side to opposite corner/side of the die, and separating the die from the die bonding device gradually and bonding the die on the die placement area; and bonding the die on the die placement area completely.

Methods and apparatus to embed host dies in a substrate are disclosed An apparatus includes a first die having a first side and a second side opposite the first side. The first side includes a first contact to be electrically coupled with a second die. The second side includes a second contact. The apparatus further includes a substrate including a metal layer and a dielectric material on the metal layer. The first die is encapsulated within the dielectric material. The second contact of the first die is bonded to the metal layer independent of an adhesive.

A semiconductor device includes a first plurality of dies encapsulated by an encapsulant, an interposer over the first plurality of dies, an interconnect structure over and electrically connected to the interposer, and a plurality of conductive pads on a surface of the interconnect structure opposite the interposer. The interposer includes a plurality of embedded passive components. Each die of the first plurality of dies is electrically connected to the interposer. The interconnect structure includes a solenoid inductor in a metallization layer of the interconnect structure.

Embodiments of a three-dimensional (3D) memory device and fabrication methods are disclosed. In some embodiments, the 3D memory device includes a peripheral circuitry formed on a first substrate. The peripheral circuitry includes a plurality of peripheral devices on a first side of the first substrate, a first interconnect layer, and a deep-trench-isolation on a second side of the first substrate, wherein the first and second sides are opposite sides of the first substrate and the deep-trench-isolation is configured to provide electrical isolation between at least two neighboring peripheral devices. The 3D memory device also includes a memory array formed on a second substrate. The memory array includes at least one memory cell and a second interconnect layer, wherein the second interconnect layer of the memory array is bonded with the first interconnect layer of the peripheral circuitry, and the peripheral devices are electrically connected with the memory cells.

Embodiments of a three-dimensional (3D) memory device and fabrication methods are disclosed. In some embodiments, the 3D memory device includes a peripheral circuitry formed on a first substrate. The peripheral circuitry includes a plurality of peripheral devices on a first side of the first substrate, a first interconnect layer, and a deep-trench-isolation on a second side of the first substrate, wherein the first and second sides are opposite sides of the first substrate and the deep-trench-isolation is configured to provide electrical isolation between at least two neighboring peripheral devices. The 3D memory device also includes a memory array formed on a second substrate. The memory array includes at least one memory cell and a second interconnect layer, wherein the second interconnect layer of the memory array is bonded with the first interconnect layer of the peripheral circuitry, and the peripheral devices are electrically connected with the memory cells.

In an embodiment, a wafer bonding system includes a chamber, a gas inlet and a gas outlet configured to control a pressure of the chamber to be in a range from 1×10.sup.−2 mbar to 1520 torr, a first wafer chuck having a first surface to support a first wafer, and a second wafer chuck having a second surface to support a second wafer, the second surface being opposite the first surface, the second wafer chuck and the first wafer chuck being movable relative to each other, wherein the second surface that supports the second wafer is divided into zones, wherein a vacuum pressure of each zone is controlled independently of other zones.

A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.