A substrate includes a base substrate, and a pad at one side of the base substrate, wherein the pad comprises: a first conductive pattern on the base substrate, an insulating layer including a plurality of contact holes exposing a portion of the first conductive pattern, and second conductive patterns separately on the insulating layer and connected to the first conductive pattern through the plurality of contact holes, wherein side surfaces of the second conductive patterns are exposed.

The invention relates to a contact bump connection (24) and to a method for producing a contact bump connection between an electronic component being provided with at least one terminal face (11) and a contact substrate (26) being contacted with the component and having at least one second terminal face (25), wherein the first terminal face is provided with a contact bump (10), which has a raised edge (15) and has at least one displacement pin (16) in a displacement compartment (18) being surrounded by the raised edge and being open towards a head end of the contact bump, and wherein, in a contact region (31) with the first terminal face, the second terminal face has a contact bead (30), which is formed by displacement of a contact material (29) of the second terminal face into the displacement compartment and which surrounds the displacement pin, said contact bead having a bead crown (33) which is oriented to a bottom (17) of the displacement compartment and is raised relative to a level contact surface (32) of the second terminal face surrounding the contact region.

A substrate includes a base substrate, and a pad at one side of the base substrate, wherein the pad comprises: a first conductive pattern on the base substrate, an insulating layer including a plurality of contact holes exposing a portion of the first conductive pattern, and second conductive patterns separately on the insulating layer and connected to the first conductive pattern through the plurality of contact holes, wherein side surfaces of the second conductive patterns are exposed.

A method for manufacturing an electronic component includes positioning a first surface of a first component facing a second surface of a second component in a first state. The first surface has a first pad having a first center. The second surface has a second pad having a second center. At least one of the first or second pads includes a metal member. The method includes melting the metal member and moving the first and second components until the melted metal member contacts both pads, moving at least one of the first or second components in a direction along the first surface, and solidifying the metal member in a second state. A first distance in a direction along the first surface between the first and second centers in the first state is longer than a second distance in the direction between the first and second centers in the second state.

Provided herein may be an electronic device. The electronic device may include a substrate provided with a plurality of connecting pads including a first metal, a semiconductor chip on an area of the substrate, facing the connecting pads, and including a base substrate including a first surface facing the substrate, and a second surface opposite the first surface, a plurality of connecting terminals on the first surface, facing the connecting pads, and including a second metal, and a non-adhesive polymer layer on the second surface, and a conductive joining layer electrically connecting, and interposed between, respective ones of the connecting pads to the connecting terminals, and including a diffusion layer in which the first metal and the second metal are mixed.

A display panel includes a substrate including a display area and a pad area spaced apart from the display area, and an uneven pad disposed on the substrate in the pad area. The uneven pad includes a first conductive layer, a first organic layer disposed on the first conductive layer and having an upper surface having an uneven shape, and a second conductive layer disposed on the first organic layer.