The present invention relates to a resist composition, especially for use in the production of electronic components via electron beam lithography. In addition to the usual base polymeric component (resist polymer), a secondary electron generator is included in resist compositions of the invention in order to promote secondary electron generation. This unique combination of components increases the exposure sensitivity of resists in a controlled fashion which facilitates the effective production of high-resolution patterned substrates (and consequential electronic components), but at much higher write speeds.

An embodiment of the invention may include a method, and resulting structure, of forming a semiconductor structure. The method may include forming a component hole from a first surface to a second surface of a base layer. The method may include placing an electrical component in the component hole. The electrical component has a conductive structure on both ends of the electrical component. The electrical component is substantially parallel to the first surface. The method may include forming a laminate layer on the first surface of the base layer, the second surface of the base layer, and between the base layer and the electrical component. The method may include creating a pair of via holes, where the pair of holes align with the conductive structures on both ends of the electrical component. The method may include forming a conductive via in the pair of via holes.

An embodiment of the invention may include a method, and resulting structure, of forming a semiconductor structure. The method may include forming a component hole from a first surface to a second surface of a base layer. The method may include placing an electrical component in the component hole. The electrical component has a conductive structure on both ends of the electrical component. The electrical component is substantially parallel to the first surface. The method may include forming a laminate layer on the first surface of the base layer, the second surface of the base layer, and between the base layer and the electrical component. The method may include creating a pair of via holes, where the pair of holes align with the conductive structures on both ends of the electrical component. The method may include forming a conductive via in the pair of via holes.

The present invention relates to a resist composition, especially for use in the production of electronic components via electron beam lithography. In addition to the usual base polymeric component (resist polymer), a secondary electron generator is included in resist compositions of the invention in order to promote secondary electron generation. This unique combination of components increases the exposure sensitivity of resists in a controlled fashion which facilitates the effective production of high-resolution patterned substrates (and consequential electronic components), but at much higher write speeds.

A chip package assembly having robust solder connections are described herein. In one example, a chip package assembly is provided that includes an integrated circuit (IC) die and a package substrate. Solder pads are arranged to connect to pillars of the IC die via solder connections. Solder resist in the corners of the package substrate and surrounding the solder connections may be inhibited from cracking isolating the portion of the solder resist surrounding the solder pads and/or by providing an offset between centerlines of the pillars and solder pads.

A die substrate, including a dielectric body, the body having a first body surface, a second body surface on an opposite side and body edge surfaces located in between. Current-carrying metal lines located in the dielectric body. One or more of the metal lines routed to one or more of the body edge surfaces. A termination layer located on the at least one body edge surface and electrically connected to the least one of the metal lines routed to the body edge surfaces. Electrically conductive plating located on the at least one body edge surface. The plating connected to the termination layer for an electrical current connection or a ground connection to the at least one metal line. A method of manufacturing an integrated circuit package, the package and a computer having the die substrate are also disclosed.

An embodiment of the invention may include a method, and resulting structure, of forming a semiconductor structure. The method may include forming a component hole from a first surface to a second surface of a base layer. The method may include placing an electrical component in the component hole. The electrical component has a conductive structure on both ends of the electrical component. The electrical component is substantially parallel to the first surface. The method may include forming a laminate layer on the first surface of the base layer, the second surface of the base layer, and between the base layer and the electrical component. The method may include creating a pair of via holes, where the pair of holes align with the conductive structures on both ends of the electrical component. The method may include forming a conductive via in the pair of via holes.

An embodiment of the invention may include a method, and resulting structure, of forming a semiconductor structure. The method may include forming a component hole from a first surface to a second surface of a base layer. The method may include placing an electrical component in the component hole. The electrical component has a conductive structure on both ends of the electrical component. The electrical component is substantially parallel to the first surface. The method may include forming a laminate layer on the first surface of the base layer, the second surface of the base layer, and between the base layer and the electrical component. The method may include creating a pair of via holes, where the pair of holes align with the conductive structures on both ends of the electrical component. The method may include forming a conductive via in the pair of via holes.

The present invention relates to a resist composition, especially for use in the production of electronic components via electron beam lithography. In addition to the usual base polymeric component (resist polymer), a secondary electron generator is included in resist compositions of the invention in order to promote secondary electron generation. This unique combination of components increases the exposure sensitivity of resists in a controlled fashion which facilitates the effective production of high-resolution patterned substrates (and consequential electronic components), but at much higher write speeds.

An integrated circuit (IC) packaging substrate includes a main body, at least one first conductive line, at least one second conductive line, and at least one protrusion pad. The first conductive line is embedded in the main body. The second conductive line is embedded in the main body. The protrusion pad is disposed on the first conductive line. The protrusion pad protrudes from the main body and is configured to be in electrical contact with a solder portion of a semiconductor chip. A first spacing between the protrusion pad and the second conductive line is determined in accordance with a process deviation of the protrusion pad by the width of the protrusion pad and the width of the first conductive line. Moreover, a semiconductor package having the IC packaging substrate and a manufacturing method of the semiconductor package are also provided.