A stamp for micro-transfer printing includes a support having a support stiffness and a support coefficient of thermal expansion (CTE). A pedestal layer is formed on the support, the pedestal layer having a pedestal layer stiffness that is less than the support stiffness and a pedestal layer coefficient of thermal expansion (CTE) that is different from the support coefficient of thermal expansion (CTE). A stamp layer is formed on the pedestal layer, the stamp layer having a body and one or more protrusions extending from the body in a direction away from the pedestal layer. The stamp layer has a stamp layer stiffness that is less than the support stiffness and a stamp layer coefficient of thermal expansion that is different from the support coefficient of thermal expansion.

This application is directed to a semiconductor system including a substrate, an electronic device, a plurality of compliant interconnects and a support structure. The substrate has a first surface and a plurality of first contacts formed on the first surface. The electronic device has a second surface facing the first surface of the substrate, and a plurality of second contacts formed on the second surface. The compliant interconnects are disposed between the first surface of the substrate and the second surface of the electronic device, and are configured to electrically couple the first contacts on the first surface of the substrate to the second contacts on the second surface of the electronic device. The support structure is coupled to the substrate and the electronic device, and extends beyond a footprint of the electronic device. The support structure is configured to mechanically couple the electronic device to the substrate.

This application is directed to a semiconductor system including a substrate, an electronic device, a plurality of compliant interconnects and a support structure. The substrate has a first surface and a plurality of first contacts formed on the first surface. The electronic device has a second surface facing the first surface of the substrate, and a plurality of second contacts formed on the second surface. The compliant interconnects are disposed between the first surface of the substrate and the second surface of the electronic device, and are configured to electrically couple the first contacts on the first surface of the substrate to the second contacts on the second surface of the electronic device. The support structure is coupled to the substrate and the electronic device, and extends beyond a footprint of the electronic device. The support structure is configured to mechanically couple the electronic device to the substrate.

An example of a printed structure comprises a target substrate and a structure protruding from a surface of the target substrate. A component comprising a component substrate separate and independent from the target substrate is disposed in alignment with the structure on the surface of the target substrate within 1 micron of the structure. An example method of making a printed structure comprises providing the target substrate with the structure protruding from the target substrate, a transfer element, and a component adhered to the transfer element. The component comprises a component substrate separate and independent from the target substrate. The transfer element and adhered component move vertically toward the surface of the target substrate and horizontally towards the structure until the component physically contacts the structure or is adhered to the surface of the target substrate. The transfer element is separated from the component.

A device for cooling a plurality of electrical components, each having a component cooling surface to be cooled, includes a first heat sink, a second heat sink, and a plurality of fasteners. The first heat sink has a first heat-sink cooling surface, and the second heat sink has a second heat-sink cooling surface. The first and second heat-sink cooling surfaces are positioned in a planar arrangement such that the first and second heat-sink cooling surfaces face each other. The first heat-sink cooling surface is configured to receive a first sub-set of the component cooling surfaces of the plurality of electrical components, and the second heat-sink cooling surface is configured to receive a second sub-set of the component cooling surfaces. The fasteners are configured to fasten the first and second heat-sink cooling surfaces to the corresponding component cooling surfaces of the plurality of electrical components to be applied.

An example of a printed structure comprises a target substrate and a structure protruding from a surface of the target substrate. A component comprising a component substrate separate and independent from the target substrate is disposed in alignment with the structure on the surface of the target substrate within 1 micron of the structure. An example method of making a printed structure comprises providing the target substrate with the structure protruding from the target substrate, a transfer element, and a component adhered to the transfer element. The component comprises a component substrate separate and independent from the target substrate. The transfer element and adhered component move vertically toward the surface of the target substrate and horizontally towards the structure until the component physically contacts the structure or is adhered to the surface of the target substrate. The transfer element is separated from the component.

In an embodiment, a semiconductor device includes: a mounting substrate having electrically conductive formations thereon, a semiconductor die coupled with the mounting substrate, the semiconductor die with electrical contact pillars facing towards the mounting substrate, an anisotropic conductive membrane between the semiconductor die and the mounting substrate, the membrane compressed between the electrical contact pillars and the mounting substrate to provide electrical contact between the electrical contact pillars of the semiconductor die and the electrically conductive formations on the mounting substrate.

In an embodiment, a semiconductor device includes: a mounting substrate having electrically conductive formations thereon, a semiconductor die coupled with the mounting substrate, the semiconductor die with electrical contact pillars facing towards the mounting substrate, an anisotropic conductive membrane between the semiconductor die and the mounting substrate, the membrane compressed between the electrical contact pillars and the mounting substrate to provide electrical contact between the electrical contact pillars of the semiconductor die and the electrically conductive formations on the mounting substrate.

An integrated circuit package includes a support substrate and a cover fastened on a first face of the support substrate. The cover and support substrate define a housing containing an electronic integrated circuit chip having a first face equipped with electrically conductive protruding elements. A first space between the cover and a second face of the electronic integrated circuit chip is filled with a first shape memory material in the austenitic state. A second space between each pair of electrically conductive protruding elements and electrically conductive contact pads of the support substrate is filled with a second shape memory material in the austenitic state.

An active substrate includes a plurality of active components distributed over a surface of a destination substrate, each active component including a component substrate different from the destination substrate, and each active component having a circuit and connection posts on a process side of the component substrate. The connection posts may have a height that is greater than a base width thereof, and may be in electrical contact with the circuit and destination substrate contacts. The connection posts may extend through the surface of the destination substrate contacts into the destination substrate connection pads to electrically connect the connection posts to the destination substrate contacts.