A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern arranged on an upper surface of the insulating plate and a heat dissipating plate arranged on a lower surface of the insulating plate. The semiconductor module also includes a semiconductor device having a collector electrode arranged on its upper surface, having an emitter electrode and a gate electrode arranged on its lower surface, and bumps respectively bonding the emitter electrode and the gate electrode to an upper surface of the circuit pattern. Each of the bumps is made of a metal sintered material such that the bump is formed to be constricted in its middle portion in a thickness direction orthogonal to a surface of the insulating plate.

A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern arranged on an upper surface of the insulating plate and a heat dissipating plate arranged on a lower surface of the insulating plate. The semiconductor module also includes a semiconductor device having a collector electrode arranged on its upper surface, having an emitter electrode and a gate electrode arranged on its lower surface, and bumps respectively bonding the emitter electrode and the gate electrode to an upper surface of the circuit pattern. Each of the bumps is made of a metal sintered material such that the bump is formed to be constricted in its middle portion in a thickness direction orthogonal to a surface of the insulating plate.

A micro light emitting diode (LED) transfer device includes a transfer part configured to transfer a relay substrate having at least one micro LED; a mask having openings corresponding to a position of the at least one micro LED; a first laser configured to irradiate a first laser light having a first wavelength to the mask; a second laser configured to irradiate a second laser light having a second wavelength different from the first wavelength to the mask; and a processor configured to: control the at least one micro LED to contact a coupling layer of a target substrate, and based on the coupling layer contacting the at least one micro LED, control the first laser to irradiate the first laser light toward the at least one micro LED, and subsequently control the second laser to irradiate the second laser light toward the at least one micro LED.

A micro light emitting diode (LED) transfer device includes a transfer part configured to transfer a relay substrate having at least one micro LED; a mask having openings corresponding to a position of the at least one micro LED; a first laser configured to irradiate a first laser light having a first wavelength to the mask; a second laser configured to irradiate a second laser light having a second wavelength different from the first wavelength to the mask; and a processor configured to: control the at least one micro LED to contact a coupling layer of a target substrate, and based on the coupling layer contacting the at least one micro LED, control the first laser to irradiate the first laser light toward the at least one micro LED, and subsequently control the second laser to irradiate the second laser light toward the at least one micro LED.

An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second surface that extends in a direction transverse to the first surface. The transfer surface includes ripples in a profile thereof such that an apex on an individual ripple is a point on a first plane and a trough on the individual ripple is a point on a second plane. The semiconductor die is disposed on the transfer surface between the first plane and the second plane such that the second surface of the semiconductor die extends transverse to the first plane and the second plane.

An apparatus includes a product substrate having a transfer surface, and a semiconductor die defined, at least in part, by a first surface adjoined to a second surface that extends in a direction transverse to the first surface. The transfer surface includes ripples in a profile thereof such that an apex on an individual ripple is a point on a first plane and a trough on the individual ripple is a point on a second plane. The semiconductor die is disposed on the transfer surface between the first plane and the second plane such that the second surface of the semiconductor die extends transverse to the first plane and the second plane.

Disclosed is a semiconductor device comprising a semiconductor substrate, an under-bump pattern on the semiconductor substrate and including a first metal, a bump pattern on the under-bump pattern, and an organic dielectric layer on the semiconductor substrate and in contact with a sidewall of the bump pattern. The bump pattern includes a support pattern in contact with the under-bump pattern and having a first width, and a solder pillar pattern on the support pattern and having a second width. The first width is greater than the second width. The support pattern includes at least one of a solder material and an intermetallic compound (IMC). The intermetallic compound includes the first metal and the solder material.

Disclosed is a semiconductor device comprising a semiconductor substrate, an under-bump pattern on the semiconductor substrate and including a first metal, a bump pattern on the under-bump pattern, and an organic dielectric layer on the semiconductor substrate and in contact with a sidewall of the bump pattern. The bump pattern includes a support pattern in contact with the under-bump pattern and having a first width, and a solder pillar pattern on the support pattern and having a second width. The first width is greater than the second width. The support pattern includes at least one of a solder material and an intermetallic compound (IMC). The intermetallic compound includes the first metal and the solder material.

An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160° C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40° C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50° C. than the reaction start temperature.

An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160° C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40° C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50° C. than the reaction start temperature.