A display device includes a conductive pattern on a substrate, a via layer on the conductive pattern with a via hole exposing the conductive pattern, a first electrode and a second electrode on the via layer and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, a bank layer on the first insulating layer defining an emission area and a subarea, a light-emitting element on the first insulating layer, and a first connection electrode and a second connection electrode on the first insulating layer and the light-emitting element. The first connection electrode electrically contacts an end of the light-emitting element, and the second connection electrode electrically contacts another end of the light-emitting element. The bank layer includes a bank extension portion extended to the subarea and the bank extension portion overlaps at least a portion of the via hole.

The present disclosure relates to an embedded packaging module comprising a first semiconductor device, a first packaging layer and a first wiring layer, the first semiconductor device having a first and a second face, at least two positioning bulges and at least one bonding pad being provided on the first face of the first semiconductor device; the first packaging layer being formed on both the first face and a surface adjacent to the first face, the positioning bulges being positioned in the first packaging layer, at least one first via hole being provided in the first packaging layer, the bottom of the first via hole being positioned in the bonding pad and contacting with the bonding pad; the first wiring layer being positioned on the side of the first packaging layer away from the first semiconductor device and being electrically connected with the bonding pad through the first via hole.

A display device includes a first electrode and a second electrode disposed on a substrate and spaced apart from each other, a light emitting element on the substrate and having a first end and a second end, a third electrode disposed on the light emitting element, and electrically connecting the first electrode with the first end of the light emitting element, an insulating pattern disposed on the third electrode and exposing the second end of the light emitting element, and a fourth electrode on the substrate, and electrically connecting the second electrode with the second end of the light emitting element. A void may be formed between the light emitting element and the insulating pattern.

A method for producing a semiconductor package includes providing a lead frame and a bond pad with a space therebetween. The frame is provided with a die bonded thereon and a die pad. The die, the pad, a part of the frame, a part of the bond pad and the space between the frame and the bond pad are encapsulated. Part of the first encapsulation is removed to create a cavity having a bottom surface including an exposed surface of the die, an exposed surface of the pad, an exposed surface of the bond pad and a connecting region between the exposed surface of the pad and the bond pad. The cavity is partly filled with an electrically conductive paste. The electrically conductive paste is cured to obtain an interconnect between the die pad and the bond pad. The interconnect is encapsulated.

Some embodiments of the invention include a connecting structure between a support and at least one die attached to the support. The die includes a number of die bond pads on a surface of the die. The connecting structure includes a plurality of via and groove combinations. Conductive material is formed in the via and groove combinations to provide connection between the die bond pads and bond pads on the support. Other embodiments are described and claimed.

A display device may include: a substrate including a display area and a non-display area; and pixels provided on the display area, and each including sub-pixels each including an emission area and a non-emission area. Each sub-pixel may include a pixel circuit layer including at least one transistor, and a display element layer including at least one light emitting element configured to emit light and connected to the transistor. The display element layer may include: a first electrode and a second electrode spaced apart from each other with the light emitting element interposed therebetween; the light emitting element connected between the first and second electrodes; and a planarization layer provided on the pixel circuit layer, and coming into contact with at least a portion of each of opposite ends of the light emitting element. The planarization layer may overlap with each of the first electrode and the second electrode.

A method of making a micro-transfer printed system includes providing a source wafer having a plurality of micro-transfer printable source devices arranged at a source spatial density; providing an intermediate wafer having a plurality of micro-transfer printable intermediate supports arranged at an intermediate spatial density less than or equal to the source spatial density; providing a destination substrate; micro-transfer printing the source devices from the source wafer to the intermediate supports of the intermediate wafer with a source stamp having a plurality of posts at a source transfer density to make an intermediate device on each intermediate support; and micro-transfer printing the intermediate devices from the intermediate wafer to the destination substrate at a destination spatial density less than the source spatial density with an intermediate stamp having a plurality of posts at an intermediate transfer density less than the source transfer density.

The present invention relates to an electrical assembly which has a conformal coating, wherein said conformal coating is obtainable by a method which comprises: (a) plasma polymerization of a compound of formula (I) and a fluorohydrocarbon, wherein the molar ratio of the compound of formula (I) to the fluorohydrocarbon is from 5:95 to 50:50, and deposition of the resulting polymer onto at least one surface of the electrical assembly: wherein: R.sub.1 represents C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.2 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.3 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.4 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; R.sub.5 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; and R.sub.6 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl, and (b) plasma polymerization of a compound of formula (I) and deposition of the resulting polymer onto the polymer formed in step (a).

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Present disclosure provides a semiconductor package, including a first substrate having a first active surface and a first trench recessed from the first active surface, a second substrate having a second trench facing the first trench, and a pathway cavity defined by the first trench and the second trench. The first trench comprises a first metal protrusion and a first insulating protrusion. A method for manufacturing the semiconductor package described herein is also disclosed.

A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.