Patent classifications
H01L2224/83912
IC CHIP MOUNTING DEVICE AND IC CHIP MOUNTING METHOD
An embodiment of the present invention is an IC chip mounting apparatus includes: a conveyor configured to convey an antenna continuous body on a conveying surface, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material, the antenna continuous body having an adhesive and an IC chip placed at a reference position of each of the antennas; a measurement unit configured to measure an interval between adjacent two of the antennas of the antenna continuous body; a press unit moving machine configured to sequentially feed out press units each having a pressing surface, from a waiting position, to move each of the press units along the conveying surface; and a controller configured to control timing of feeding out each of the press units from the waiting position based on the interval measured by the measurement unit, so that the pressing surface of each of the press units presses a predetermined region containing the reference position of each of the antennas on the conveying surface.
Display device and method for producing same
In a display device, in which an IC chip, which has an output and an input bump group, is mounted onto a display panel via an ACF, and a total area of end surfaces of output bumps that form the output bump group is larger than a total area of end surfaces of input bumps that form the input bump group, a concentration of conductive particles in a portion of the ACF corresponding to the output bump group is lower than a concentration of conductive particles in a portion of the ACF corresponding to the input bump group.
SOLDER REFLOW SYSTEM AND SOLDER REFLOW METHOD USING THE SAME
A solder reflow system may include a solder reflow apparatus, a condensation apparatus and a cleaning apparatus. The solder reflow apparatus may be configured to reflow a solder of a semiconductor package using a heat transfer fluid. The condensation apparatus may be configured to receive the semiconductor package processed by the solder reflow apparatus. The condensation apparatus may condensate a gas generated from the heat transfer fluid to convert the gas into a liquid. The cleaning apparatus may be configured to clean the semiconductor package processed by the condensation apparatus using a cleaning agent. Thus, the heat transfer fluid stained with the semiconductor package may be removed by the condensation apparatus so that the heat transfer fluid may not be introduced into the cleaning apparatus. As a result, the heat transfer fluid may not be mixed with the cleaning agent to maintain cleaning capacity of the cleaning agent.
Three dimensional device integration method and integrated device
A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.
Light emitting die (LED) packages and related methods
LED packages and related methods are provided. The LED packages can include a submount having a top and bottom surface and a plurality of top electrically conductive elements on the top surface of the submount. An LED can be disposed on one of the top electrically conductive elements. The LED can emit a dominant wavelength generally between approximately 600 nm and approximately 650 nm, and more particularly between approximately 610 nm and approximately 630 nm when an electrical signal is applied to the top electrically conductive elements. A bottom thermally conductive element can be provided on the bottom surface and is not in electrical contact with the top electrically conductive elements. A lens can be disposed over the LED. The LED packages can have improved lumen performances, lower thermal resistances, improved efficiencies, and longer operational lifetimes.
Techniques for adhesive control between a substrate and a die
Semiconductor devices are described that employ techniques configured to control adhesive application between a substrate and a die. In an implementation, a sacrificial layer is provided on a top surface of the die to protect the surface, and bonds pads thereon, from spill-over of the adhesive. The sacrificial layer and spill-over adhesive are subsequently removed from the die and/or chip carrier. In an implementation, the die includes a die attach film (DAF) on a bottom surface of the die for adhering the die to the cavity of the substrate. The die is applied to the cavity with heat and pressure to cause a portion of the die attach film (DAF) to flow from the bottom surface of the die to a sloped surface of the substrate cavity.
Massively parallel transfer of microLED devices
MicroLED devices can be transferred in large numbers to form microLED displays using processes such as pick-and-place, thermal adhesion transfer, or fluidic transfer. A blanket solder layer can be applied to connect the bond pads of the microLED devices to the terminal pads of a support substrate. After heating, the solder layer can connect the bond pads with the terminal pads in vicinity of each other. The heated solder layer can correct misalignments of the microLED devices due to the transfer process.
THREE DIMENSIONAL DEVICE INTEGRATION METHOD AND INTEGRATED DEVICE
A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.
Three dimensional device integration method and integrated device
A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. A conductor array having a plurality of contact structures may be formed on an exposed surface of the semiconductor device, vias may be formed through the semiconductor device to device regions, and interconnection may be formed between said device regions and said contact structures.