A semiconductor device includes a first lead portion and a second lead portion spaced from each other in a first direction. A semiconductor chip is mounted to the first lead portion. A first connector has a first portion contacting a second electrode on the chip and a second portion connected to the second lead portion. A second connector has third portion that contacts the second electrode, but at a position further away than the first portion, and a fourth portion connected to the second portion. At least a part of the second connector overlaps a part of the first connector between the first lead portion and the second lead portion.

A semiconductor device includes a first lead portion and a second lead portion spaced from each other in a first direction. A semiconductor chip is mounted to the first lead portion. A first connector has a first portion contacting a second electrode on the chip and a second portion connected to the second lead portion. A second connector has third portion that contacts the second electrode, but at a position further away than the first portion, and a fourth portion connected to the second portion. At least a part of the second connector overlaps a part of the first connector between the first lead portion and the second lead portion.

An object is to provide a semiconductor device in which heat generated in a lead electrode when conducting a large current can be reduced and the bonding quality between the lead electrode and a semiconductor element can be inspected easily. A semiconductor device includes: a base portion; a semiconductor element mounted on the base portion; a metal part erect with respect to the semiconductor element and having one end bonded, with a bonding material, to a principal surface of the semiconductor element opposite to another principal surface of the semiconductor element mounted on the base portion; and a lead electrode connected to the semiconductor element through the metal part. The lead electrode includes a through hole extending in a thickness direction. The metal part connects the semiconductor element to the lead electrode, while inserted into the through hole of the lead electrode together with a part of the bonding material.

One aspect of the invention relates to a method for producing a chip assemblage. Two or more chip assemblies are produced in each case by cohesively and electrically conductively connecting an electrically conductive first compensation lamina to a first main electrode of a semiconductor chip. A control electrode interconnection structure is arranged in a free space between the chip assemblies. Electrically conductive connections are produced between the control electrode interconnection structure and control electrodes of the semiconductor chips of the individual chip assemblies. The chip assemblies are cohesively connected by means of a dielectric embedding compound.

A first alignment resin (4) is formed in an annular shape on an electrode (3) of an insulating substrate (1). First plate solder (5) having a thickness thinner than that of the first alignment resin (4) is arranged on the electrode (3) on an inner side of the annular shape of the first alignment resin (4). A semiconductor chip (6) is arranged on the first plate solder (5). The first plate solder (5) is made to melt to bond a lower surface of the semiconductor chip (6) to the electrode (3).

A semiconductor device includes a first lead portion and a second lead portion spaced from each other in a first direction. A semiconductor chip is mounted to the first lead portion. A first connector has a first portion contacting a second electrode on the chip and a second portion connected to the second lead portion. A second connector has third portion that contacts the second electrode, but at a position further away than the first portion, and a fourth portion connected to the second portion. At least a part of the second connector overlaps a part of the first connector between the first lead portion and the second lead portion.

According to one embodiment, a semiconductor device includes a semiconductor chip, first and second conductive members, a first connection member, and a resin portion. The first conductive member includes first and second portions. The second portion is electrically connected to the semiconductor chip. A direction from the semiconductor chip toward the second portion is aligned with a first direction. A direction from the second portion toward the first portion is aligned with a second direction crossing the first direction. The second conductive member includes a third portion. The first connection member is provided between the first and third portion. The first connection member is conductive. The resin portion includes a first partial region. The first partial region is provided around the first and third portions, and the first connection member. The first portion has a first surface opposing the first connection member and including a recess and a protrusion.

A semiconductor device according to the present invention includes: a circuit board; a semiconductor element having a main electrode; a metal frame; and a metal plate having a flat plate shape, the metal plate being disposed between the metal frame and the main electrode, wherein the metal plate and a conductive bonding material, form a stress relaxation structure which relaxes a stress applied to metal plate and the conductive bonding material, disposed between the metal frame and the semiconductor element, and the stress relaxation structure is configured such that a thickness of the metal plate is smaller than a thickness of the metal frame, and at least one convex portion is formed on the metal plate at a position which corresponds to the main electrode. The semiconductor device according to the present invention can relax a stress applied to a conductive bonding material between a semiconductor element and a metal frame even when a relatively thick metal frame is used.

The present disclosure describes a power module having a substrate, first and second pluralities of vertical power devices, and first and second terminal assemblies. The substrate has a top surface with a first trace and a second trace. The first plurality of vertical power devices and the second plurality of vertical power devices are electrically coupled to form part of a power circuit. The first plurality of vertical power devices is electrically and mechanically directly coupled between the first trace and a bottom of a first elongated bar of the first terminal assembly. The second plurality of vertical power devices are electrically and mechanically directly coupled between the second trace and a bottom of a second elongated bar of the second terminal assembly.

A semiconductor device semiconductor chip mounted to a leadframe that includes an electrically conductive pad. An electrically conductive clip is arranged in a bridge-like position between the semiconductor chip and the electrically conductive pad. The electrically conductive clip is soldered to the semiconductor chip and to the electrically conductive pad via soldering material applied at coupling surfaces facing towards the semiconductor chip and the electrically conductive pad. The device further includes a pair of complementary positioning formations formed by a cavity in the electrically conductive clip and a protrusion (such as a stud bump or a stack of stud bumps) formed in the electrically conductive pad. The complementary positioning formations are mutually engaged to retain the electrically conductive clip in the bridge-like position to avoid displacement during soldering.