Patent classifications
H01L2224/84395
Manufacturing method for power semiconductor device, and power semiconductor device
An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.
MANUFACTURING METHOD FOR POWER SEMICONDUCTOR DEVICE, AND POWER SEMICONDUCTOR DEVICE
An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING DEVICE
An integrated circuit semiconductor die is arranged on a substrate having electrically conductive leads. Electrical coupling of the semiconductor die is provided via electrically conductive ribbons having a first end portion electrically coupled to the semiconductor die and a second end portion electrically coupled to the lead. The first end portion of the electrically conductive ribbon is ultrasonically coupled (bonded) to the semiconductor die. The second end portion of the electrically conductive ribbon is coupled to the lead via electrically conductive material, such as film or tape or glue/solder paste added at the second end portion of the electrically conductive ribbon.