An electrical interconnect structure includes a bond pad having a substantially planar bonding surface, and a solder enhancing structure that is disposed on the bonding surface and includes a plurality of raised spokes that are each elevated from the bonding surface. Each of the raised spokes has a lower wettability relative to a liquefied solder material than the bonding surface. Each of the raised spokes extend radially outward from a center of the solder enhancing structure.

An electrical interconnect structure includes a bond pad having a substantially planar bonding surface, and a solder enhancing structure that is disposed on the bonding surface and includes a plurality of raised spokes that are each elevated from the bonding surface. Each of the raised spokes has a lower wettability relative to a liquefied solder material than the bonding surface. Each of the raised spokes extend radially outward from a center of the solder enhancing structure.

A semiconductor module includes a laminated substrate that includes a heat radiating plate, and an insulation layer having a conductive pattern thereof and being disposed on a top surface of the heat radiating plate, a semiconductor element disposed on a top surface of the conductive pattern, an integrated circuit that controls driving of the semiconductor element, a control-side lead frame having a primary surface on which the integrated circuit is disposed, and a mold resin that seals the laminated substrate, the semiconductor element, the integrated circuit, and the control-side lead frame. The control-side lead frame has a rod-shaped first pin having a first end, a first end side of the first pin extending toward the top surface of the heat radiating plate, and the heat radiating plate has at least one insertion hole into one of which the first end of the first pin is press-fitted.

A semiconductor module includes a laminated substrate that includes a heat radiating plate, and an insulation layer having a conductive pattern thereof and being disposed on a top surface of the heat radiating plate, a semiconductor element disposed on a top surface of the conductive pattern, an integrated circuit that controls driving of the semiconductor element, a control-side lead frame having a primary surface on which the integrated circuit is disposed, and a mold resin that seals the laminated substrate, the semiconductor element, the integrated circuit, and the control-side lead frame. The control-side lead frame has a rod-shaped first pin having a first end, a first end side of the first pin extending toward the top surface of the heat radiating plate, and the heat radiating plate has at least one insertion hole into one of which the first end of the first pin is press-fitted.

Provided is a semiconductor package including: at least one first substrate including at least one first substrate terminal extended therefrom; at least one second substrate joined to the upper surface of the first substrate using ultrasonic welding; at least one semiconductor chip joined to the upper surface of the second substrate; a package housing covering the at least one semiconductor chip and an area of the second substrate, where ultrasonic welding is performed; and terminals separated from the first substrate, electrically connected to the at least one semiconductor chip through electric signals, and at least one of them is exposed to the outside of the package housing, wherein a thickness of the terminals formed inside the package housing is same as or smaller than a thickness of the first substrate and the second substrate includes at least one embossing groove on the upper surface thereof.

Provided is a semiconductor package including: at least one first substrate including at least one first substrate terminal extended therefrom; at least one second substrate joined to the upper surface of the first substrate using ultrasonic welding; at least one semiconductor chip joined to the upper surface of the second substrate; a package housing covering the at least one semiconductor chip and an area of the second substrate, where ultrasonic welding is performed; and terminals separated from the first substrate, electrically connected to the at least one semiconductor chip through electric signals, and at least one of them is exposed to the outside of the package housing, wherein a thickness of the terminals formed inside the package housing is same as or smaller than a thickness of the first substrate and the second substrate includes at least one embossing groove on the upper surface thereof.

Provided is a metal paste for joints, containing: metal particles; and linear or branched monovalent aliphatic alcohol having 1 to 20 carbon atoms, in which the metal particles include sub-micro copper particles having a volume average particle diameter of 0.12 μm to 0.8 μM.

Provided is a metal paste for joints, containing: metal particles; and linear or branched monovalent aliphatic alcohol having 1 to 20 carbon atoms, in which the metal particles include sub-micro copper particles having a volume average particle diameter of 0.12 μm to 0.8 μM.

Provided is a semiconductor package including: at least one first substrate including at least one first substrate terminal extended therefrom; at least one second substrate joined to the upper surface of the first substrate using ultrasonic welding; at least one semiconductor chip joined to the upper surface of the second substrate; a package housing covering the at least one semiconductor chip and an area of the second substrate, where ultrasonic welding is performed; and terminals separated from the first substrate, electrically connected to the at least one semiconductor chip through electric signals, and at least one of them is exposed to the outside of the package housing, wherein a thickness of the terminals formed inside the package housing is same as or smaller than a thickness of the first substrate and the second substrate includes at least one embossing groove on the upper surface thereof.

Provided is a semiconductor package including: at least one first substrate including at least one first substrate terminal extended therefrom; at least one second substrate joined to the upper surface of the first substrate using ultrasonic welding; at least one semiconductor chip joined to the upper surface of the second substrate; a package housing covering the at least one semiconductor chip and an area of the second substrate, where ultrasonic welding is performed; and terminals separated from the first substrate, electrically connected to the at least one semiconductor chip through electric signals, and at least one of them is exposed to the outside of the package housing, wherein a thickness of the terminals formed inside the package housing is same as or smaller than a thickness of the first substrate and the second substrate includes at least one embossing groove on the upper surface thereof.