Patent classifications
H01L2224/844
SEMICONDUCTOR DEVICE
A semiconductor device includes: a seal portion; a first electronic element; a first lead terminal; a second lead terminal having one end that is disposed to be close to the one end of the first lead terminal within the seal portion, and another end that is exposed from another end of the seal portion, the other end of the seal portion being along the longitudinal direction; a first connecting element disposed within the seal portion, and having one end that is electrically connected to the first electrode disposed on the first electronic element, and another end that is electrically connected to the one end of the second lead terminal; and a conductive bonding agent.
SEMICONDUCTOR DEVICE
A semiconductor device includes: a seal portion; a first electronic element; a first lead terminal; a second lead terminal having one end that is disposed to be close to the one end of the first lead terminal within the seal portion, and another end that is exposed from another end of the seal portion, the other end of the seal portion being along the longitudinal direction; a first connecting element disposed within the seal portion, and having one end that is electrically connected to the first electrode disposed on the first electronic element, and another end that is electrically connected to the one end of the second lead terminal; and a conductive bonding agent.
Multilayer clip structure attached to a chip
Disclosed is technology in that a clip structure formed of an inexpensive and light metallic material to easily performing soldering on a corresponding metal and to reduce costs of a semiconductor package and to reduce the weight of the semiconductor package. The composite clip structure bent at a predetermined angle and being in charge of electrical connection between components in a semiconductor package includes a main metal layer formed of a conductive material with a predetermined thickness, and a lower functional layer formed below the main metal layer and formed of a different type of metal from a metallic component of the main metal layer, wherein the lower functional layer is attached to the main metal layer to be integrated thereinto, and wherein the main metal layer is formed of a single metal containing a largest amount of aluminum (Al) or a metal mixture containing a largest amount of Al.
Multilayer clip structure attached to a chip
Disclosed is technology in that a clip structure formed of an inexpensive and light metallic material to easily performing soldering on a corresponding metal and to reduce costs of a semiconductor package and to reduce the weight of the semiconductor package. The composite clip structure bent at a predetermined angle and being in charge of electrical connection between components in a semiconductor package includes a main metal layer formed of a conductive material with a predetermined thickness, and a lower functional layer formed below the main metal layer and formed of a different type of metal from a metallic component of the main metal layer, wherein the lower functional layer is attached to the main metal layer to be integrated thereinto, and wherein the main metal layer is formed of a single metal containing a largest amount of aluminum (Al) or a metal mixture containing a largest amount of Al.
PACKAGED MULTICHIP DEVICE WITH STACKED DIE HAVING A METAL DIE ATTACH
A leadless multichip semiconductor device includes a metal substrate having a through-hole aperture with an outer ring for holding a bottom semiconductor die with an inner row and an outer row of metal pads. The bottom semiconductor die has a back side metal (BSM) layer on its bottom side and a top side with bond pads mounted top side up on the ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate providing a die attachment that fills a bottom portion of the aperture. Bond wires are between the inner metal pads and the bond pads. A top semiconductor die has top bond pads mounted top side up on a dielectric adhesive on the bottom semiconductor die. Pins connect the top bond pads to the outer metal pads. A mold compound provides isolation between adjacent ones of the metal pads.
PACKAGED MULTICHIP DEVICE WITH STACKED DIE HAVING A METAL DIE ATTACH
A leadless multichip semiconductor device includes a metal substrate having a through-hole aperture with an outer ring for holding a bottom semiconductor die with an inner row and an outer row of metal pads. The bottom semiconductor die has a back side metal (BSM) layer on its bottom side and a top side with bond pads mounted top side up on the ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate providing a die attachment that fills a bottom portion of the aperture. Bond wires are between the inner metal pads and the bond pads. A top semiconductor die has top bond pads mounted top side up on a dielectric adhesive on the bottom semiconductor die. Pins connect the top bond pads to the outer metal pads. A mold compound provides isolation between adjacent ones of the metal pads.
Packaged multichip device with stacked die having a metal die attach
A leadless multichip semiconductor device includes a metal substrate having a through-hole aperture with an outer ring for holding a bottom semiconductor die with an inner row and an outer row of metal pads. The bottom semiconductor die has a back side metal (BSM) layer on its bottom side and a top side with bond pads mounted top side up on the ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate providing a die attachment that fills a bottom portion of the aperture. Bond wires are between the inner metal pads and the bond pads. A top semiconductor die has top bond pads mounted top side up on a dielectric adhesive on the bottom semiconductor die. Pins connect the top bond pads to the outer metal pads. A mold compound provides isolation between adjacent ones of the metal pads.
Packaged multichip device with stacked die having a metal die attach
A leadless multichip semiconductor device includes a metal substrate having a through-hole aperture with an outer ring for holding a bottom semiconductor die with an inner row and an outer row of metal pads. The bottom semiconductor die has a back side metal (BSM) layer on its bottom side and a top side with bond pads mounted top side up on the ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate providing a die attachment that fills a bottom portion of the aperture. Bond wires are between the inner metal pads and the bond pads. A top semiconductor die has top bond pads mounted top side up on a dielectric adhesive on the bottom semiconductor die. Pins connect the top bond pads to the outer metal pads. A mold compound provides isolation between adjacent ones of the metal pads.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
A semiconductor device includes a semiconductor body; an electrode provided on the semiconductor body and electrically connected to the semiconductor body; a first metal layer selectively provided on the electrode; an insulating layer surrounding the first metal layer on the electrode; and a second metal layer provided on the first metal layer. The insulating layer includes a first surface and a second surface adjacent to the first surface. The first surface contacts a top surface of the first metal layer at an outer edge of the first metal layer. The second metal layer has an outer edge contacting the second surface of the insulating layer.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
A semiconductor device includes a semiconductor body; an electrode provided on the semiconductor body and electrically connected to the semiconductor body; a first metal layer selectively provided on the electrode; an insulating layer surrounding the first metal layer on the electrode; and a second metal layer provided on the first metal layer. The insulating layer includes a first surface and a second surface adjacent to the first surface. The first surface contacts a top surface of the first metal layer at an outer edge of the first metal layer. The second metal layer has an outer edge contacting the second surface of the insulating layer.