H01L2224/8501

Repackaged integrated circuit assembly method
20180005910 · 2018-01-04 · ·

A method is provided. The method includes one or more of extracting a die from an original packaged integrated circuit, modifying the extracted die, reconditioning the modified extracted die, placing the reconditioned die into a cavity of a hermetic package base, bonding a plurality of bond wires between reconditioned die pads of the reconditioned die to leads of the hermetic package base or downbonds to create an assembled hermetic package base, and sealing a hermetic package lid to the assembled hermetic package base to create a new packaged integrated circuit. Modifying the extracted die includes removing the one or more ball bonds on the one or more die pads. Reconditioning the modified extracted die includes adding a sequence of metallic layers to bare die pads of the modified extracted die. The extracted die is a fully functional semiconductor die with one or more ball bonds on one or more die pads of the extracted die.

SEMICONDUCTOR DEVICES AND PROCESSING METHODS
20170236801 · 2017-08-17 ·

Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

Ball bonding metal wire bond wires to metal pads

An apparatus, and methods therefor, relates generally to an integrated circuit package. In such an apparatus, a platform substrate has a copper pad. An integrated circuit die is coupled to the platform substrate. A wire bond wire couples a contact of the integrated circuit die and the copper pad. A first end of the wire bond wire is ball bonded with a ball bond for direct contact with an upper surface of the copper pad. A second end of the wire bond wire is stitch bonded with a stitch bond to the contact.

Mixed impedance leads for die packages and method of making the same

A die package having mixed impedance leads where a first lead has a first metal core, and a dielectric layer surrounding the first metal core, and a second lead has a second metal core, and a second dielectric layer surrounding the second metal core, with the dielectric thicknesses differing from each other. A method of making a die package having leads with different impedances formed by connecting the die package to the die substrate connection pads via a first wirebond having a first metal core, depositing a dielectric layer on the wirebond metal core, metalizing the dielectric layer, connecting the die package to the die substrate connection pads via a second wirebond having a second metal core, depositing a dielectric layer on the second wirebond second metal core, and metalizing the dielectric layer on the second metal core, such that the first wirebond has a different impedance than the second wire bond.

Repackaged integrated circuit assembly method

A method is provided. The method includes one or more of extracting a die from an original packaged integrated circuit, modifying the extracted die, reconditioning the modified extracted die, placing the reconditioned die into a cavity of a hermetic package base, bonding a plurality of bond wires between reconditioned die pads of the reconditioned die to leads of the hermetic package base or downbonds to create an assembled hermetic package base, and sealing a hermetic package lid to the assembled hermetic package base to create a new packaged integrated circuit. Modifying the extracted die includes removing the one or more ball bonds on the one or more die pads. Reconditioning the modified extracted die includes adding a sequence of metallic layers to bare die pads of the modified extracted die. The extracted die is a fully functional semiconductor die with one or more ball bonds on one or more die pads of the extracted die.

Semiconductor devices and processing methods

Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

Method For Producing Wire Bond Connection And Arrangement For Implementing The Method
20180218996 · 2018-08-02 ·

Method for producing wire bond connections between an electronic component or a module and a substrate with energy input into a bonding wire by an ultrasonic transducer, wherein during the energy input for forming a first wire bond connection, at least one bonding parameter characterizing the instantaneous state of the bonding wire is measured in dependence on time, the curve shape of the time dependence is differentiated by means of predetermined comparative criteria or curves into three curve sections and hereby the temporal course of the method into three phases, to be specific, a cleaning, a fusion and a tempering phase, and the energy fed into the ultrasonic transducer and/or the bonding force exerted on the bonding wire and/or the duration of the energy input into at least one partial section of at least the cleaning and the fusion phase, in particular each of the cleaning, fusion and tempering phases is/are controlled independent of the measurement result in quasi real time during the formation of the first wire bond connection or during the subsequent formation of a second wire bond connection of the same type in dependence on the curve shape in the associated curve section in a phase-specific manner.

Semiconductor device

A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.

Repackaged integrated circuit and assembly method

A packaged integrated circuit for operating reliably at elevated temperatures is provided. The packaged integrated circuit includes a reconditioned die, which includes a fully functional semiconductor die that has been previously extracted from a different packaged integrated circuit. The packaged integrated circuit also includes a hermetic package comprising a base and a lid and a plurality of bond wires. The reconditioned die is placed into a cavity in the base. After the reconditioned die is placed into the cavity, the plurality of bond wires are bonded between pads of the reconditioned die and package leads of the hermetic package base or downbonds. After bonding the plurality of bond wires, the lid is sealed to the base.

SEMICONDUCTOR DEVICE
20170170100 · 2017-06-15 ·

A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.