Patent classifications
H01L2224/85395
Palladium-coated copper bonding wire, wire bonding structure, semiconductor device, and manufacturing method of semiconductor device
The bonding wire being a Pd-coated copper bonding wire includes: a copper core material; and a Pd layer and containing a sulfur group element, in which with respect to the total of copper, Pd, and the sulfur group element, a concentration of Pd is 1.0 mass % to 4.0 mass % and a total concentration of the sulfur group element is 50 mass ppm or less, and a concentration of S is 5 mass ppm to 2 mass ppm, a concentration of Se is 5 mass ppm to 20 mass ppm, or a concentration of Te is 15 mass ppm to 50 mass ppm or less. A wire bonding structure includes a Pd-concentrated region with the concentration of Pd being 2.0 mass % or more relative to the total of Al, copper, and Pd near a bonding surface of an Al-containing electrode of a semiconductor chip and a ball bonding portion.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device capable of suppressing propagation of a crack caused by a temperature cycle at a bonding part between a bonding pad and a bonding wire is provided. A semiconductor device according to an embodiment includes a semiconductor chip having bonding pads and bonding wires. The bonding pad includes a barrier layer and a bonding layer formed on the barrier layer and formed of a material containing aluminum. The bonding wire is bonded to the bonding pad and formed of a material containing copper. An intermetallic compound layer formed of an intermetallic compound containing copper and aluminum is formed so as to reach the barrier layer from the bonding wire in at least a part of the bonding part between the bonding pad and the bonding wire.
Printed circuit board and semiconductor package
A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.
SEMICONDUCTOR PACKAGE WITH NICKEL-SILVER PRE-PLATED LEADFRAME
A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.
PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
A printed circuit board comprises an epoxy-containing member, a first copper pattern disposed adjacent to the epoxy-containing member, and a first adhesion promoter layer interposed between the epoxy-containing member and the first copper pattern.
WIRE BONDED SEMICONDUCTOR DEVICE PACKAGE
In a described example, an apparatus includes: a metal leadframe including a dielectric die support formed in a central portion of the leadframe, and having metal leads extending from the central portion, portions of the metal leads extending into the central portion contacted by the dielectric die support; die attach material over the dielectric die support; a semiconductor die mounted to the dielectric die support by the die attach material, the semiconductor die having bond pads on a device side surface facing away from the dielectric die support; electrical connections extending from the bond pads to metal leads of the leadframe; and mold compound covering the semiconductor die, the electrical connections, the dielectric die support, and portions of the metal leads, the mold compound forming a package body.
Semiconductor package with nickel-silver pre-plated leadframe
A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.
Method for manufacturing printed circuit boards
A method including: attaching a plurality of conductive tracks to at least one surface of a substrate, depositing a coating comprising at least one halo-hydrocarbon polymer on the at least one surface of the substrate, and soldering through the coating.
SEMICONDUCTOR PACKAGE WITH NICKEL-SILVER PRE-PLATED LEADFRAME
A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.