Patent classifications
H01L2224/85395
Semiconductor package and method of fabricating the same
A semiconductor package includes a semiconductor substrate, a conductive pad on the semiconductor substrate, a redistribution line conductor, a coating insulator, and an aluminum oxide layer. The redistribution line conductor is electrically connected to the conductive pad. The coating insulator covers the redistribution line conductor and partially exposes the redistribution line conductor. The aluminum oxide layer is provided below the coating insulator and extends along a top surface of the redistribution line conductor, and the aluminum oxide layer is in contact with the redistribution line conductor.
DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE
A display device including a display panel including a first panel pad, a first circuit board including a first pad spaced from the first panel pad and a coating member on the first pad, and a wire connecting the first panel pad and the first pad to each other. The coating member includes a same material as the wire and integrally connected to the wire.
PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE
A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.
SEMICONDUCTOR PACKAGE WITH NICKEL-SILVER PRE-PLATED LEADFRAME
A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.
PALLADIUM-COATED COPPER BONDING WIRE, WIRE BONDING STRUCTURE, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
The bonding wire being a Pd-coated copper bonding wire includes: a copper core material; and a Pd layer and containing a sulfur group element, in which with respect to the total of copper, Pd, and the sulfur group element, a concentration of Pd is 1.0 mass % to 4.0 mass % and a total concentration of the sulfur group element is 50 mass ppm or less, and a concentration of S is 5 mass ppm to 2 mass ppm, a concentration of Se is 5 mass ppm to 20 mass ppm, or a concentration of Te is 15 mass ppm to 50 mass ppm or less. A wire bonding structure includes a Pd-concentrated region with the concentration of Pd being 2.0 mass % or more relative to the total of Al, copper, and Pd near a bonding surface of an Al-containing electrode of a semiconductor chip and a ball bonding portion.
Semiconductor device and method of manufacturing the same
A semiconductor device capable of suppressing propagation of a crack caused by a temperature cycle at a bonding part between a bonding pad and a bonding wire is provided. A semiconductor device according to an embodiment includes a semiconductor chip having bonding pads and bonding wires. The bonding pad includes a barrier layer and a bonding layer formed on the barrier layer and formed of a material containing aluminum. The bonding wire is bonded to the bonding pad and formed of a material containing copper. An intermetallic compound layer formed of an intermetallic compound containing copper and aluminum is formed so as to reach the barrier layer from the bonding wire in at least a part of the bonding part between the bonding pad and the bonding wire.
Printed circuit board and semiconductor package
A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
A semiconductor package includes a semiconductor substrate, a conductive pad on the semiconductor substrate, a redistribution line conductor, a coating insulator, and an aluminum oxide layer. The redistribution line conductor is electrically connected to the conductive pad. The coating insulator covers the redistribution line conductor and partially exposes the redistribution line conductor. The aluminum oxide layer is provided below the coating insulator and extends along a top surface of the redistribution line conductor, and the aluminum oxide layer is in contact with the redistribution line conductor.
Printed circuit board and semiconductor package including the same
A printed circuit board comprises an epoxy-containing member, a first copper pattern disposed adjacent to the epoxy-containing member, and a first adhesion promoter layer interposed between the epoxy-containing member and the first copper pattern.
PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE
A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.