Patent classifications
H
H01
H01L
2224/00
H01L2224/80
H01L2224/85
H01L2224/8538
H01L2224/85399
H01L2224/85498
H01L2224/85598
H01L2224/85599
H01L2224/856
H01L2224/85663
H01L2224/85664
H01L2224/85664
Methods for packaging integrated circuits
Techniques for packaging an integrated circuit include attaching a die to a conductive layer before forming dielectric layers on an opposing surface of the conductive layer. The conductive layer may first be formed on a carrier substrate before the die is disposed on the conductive layer. The die may be electrically coupled to the conductive layer via wires or solder bumps. The carrier substrate is removed before the dielectric layers are formed. The dielectric layers may collectively form a coreless package substrate for the integrated circuit package.