Provided is a photosensitive resin composition containing: a photopolymerizable compound (A) having an ethylenically unsaturated group; a photopolymerization initiator (B); and an inorganic filler (F), in which the photopolymerizable compound (A) having an ethylenically unsaturated group includes a photopolymerizable compound (A1) having an acidic substituent and an alicyclic structure together with an ethylenically unsaturated group, and the inorganic filler (F) includes an inorganic filler surface-treated with a coupling agent without at least one functional group selected from the group consisting of an amino group and a (meth)acryloyl group. The present disclosure also provides a photosensitive resin composition for photo via formation, and a photosensitive resin composition for interlayer insulating layer. The present disclosure further provides: a photosensitive resin film and a photosensitive resin film for interlayer insulating layer, each of which contains the photosensitive resin composition; a multilayered printed wiring board and a semiconductor package; and a method for producing a multilayered printed wiring board.

Provided is a power semiconductor module that can secure insulating properties. A semiconductor element is mounted on a resin-insulated base plate including a circuit pattern, a resin insulating layer, and a base plate. A case enclosing the resin-insulated base plate is bonded to the resin insulating layer with an adhesive. The resin insulating layer and the case are bonded together with a region enclosed by the resin insulating layer and a tapered portion of the case formed closer to the resin insulating layer being filled with the adhesive made of a material identical to that of the sealing resin. Air bubbles in the adhesive appear in the tapered portion opposite to the resin insulating layer.

The present invention provides a prepreg for a coreless substrate and a coreless substrate and a semiconductor package using the prepreg, which can satisfy heat resistance, low thermal expansion, and bonding strength with a metal circuit at a level required for the coreless substrate. Specifically, the prepreg for a coreless substrate contains a thermosetting resin composition containing (a) dicyandiamide, (b) an adduct of a tertiary phosphine and quinones, (c) an amine compound having at least two primary amino groups, and (d) a maleimide compound having at least two primary amino groups having at least two N-substituted maleimide groups. Instead of (c) the amine compound having at least two primary amino groups and (d) the maleimide compound, having at least two N-substituted maleimide groups, (X) an amino-modified polyimide resin obtained by reacting them may be used.

A method of producing a substrate includes: applying a composition on a metal basal plate to form a coating film; and forming a metal-containing layer on at least a part of the coating film. The composition contains a solvent, and a polymer having a first terminal structure and a second terminal structure in a single molecule. Each of the first terminal structure and the second terminal structure is at least one selected from the group consisting of a structure represented by formula (1) and a structure represented by formula (2). A.sup.1 and A.sup.2 each independently represent a monovalent group having a functional group capable of forming a chemical bond with a metal atom. L.sup.2 represents —S—, —NR—, or —NA.sup.22-, wherein A.sup.22 represents a monovalent group having a functional group capable of forming a chemical bond with a metal atom. ##STR00001##

A laminate body including a base material and a flat silicone sealing layer adhered thereto, generally without any voids, is provided. Also provided is a curable hot melt silicone composition layer with a particular curable hot melt silicone composition, providing a laminate body that does not readily cause stress on a substrate after the curable hot melt silicone composition is cured. A laminate body comprises a base material, and a curable hot melt silicone composition layer in contact with the base material. The curable hot melt silicone composition includes an organopolysiloxane resin containing siloxane units selected from a group containing T units or Q units making up at least 20 mol % or more of all siloxane units. The curable hot melt silicone composition generally has a melt viscosity as measured using a flow tester at a pressure of 2.5 MPa and at 100° C. of 5,000 Pa.Math.s or less.

An electronic circuit device according to the present invention includes a base substrate including a wiring layer having a connection part, at least one electronic circuit element, and a re-distribution layer including a photosensitive resin layer, the photosensitive resin layer enclosing a surface on which a connection part of the electronic circuit element is formed and a side surface of the electronic circuit element and embedding a first wiring photo via, a second wiring photo via and a wiring, the first wiring photo via directly connected to the connection part of the electronic circuit element, the second wiring photo via arranged at the outer periphery of the electronic circuit element and directly connected to a connection part of the wiring layer, the wiring electrically connected to the first wiring photo via and the second wiring photo via on a same surface.

Provided is a package device, relating to the technical field of lamp beads. The package device comprises an SMD holder, wherein the SMD holder is a hollow housing with one end opened; and the material of sidewalls of the SMD holder is transparent plastic. In the package device provided by the present invention, a transparent material is provided as the material of the sidewalls of the SMD holder, and light generated after a chip is powered on can be partially transmitted out through the sidewalls of the SMD holder, avoiding blocking of the light generated after the chip is powered on by the sidewalls of the SMD holder, thereby increasing transmittance of light from the chip.

A semiconductor device includes a first electrode; a second electrode; a resin case surrounding the first electrode and the second electrode; and a resin insulating part made of a material the same as a material of the resin case and covering part of the first electrode and part of the second electrode inside the resin case. The resin insulating part contacts an inner wall of the resin case or is separated from the inner wall of the resin case. A move positioned between the first electrode and the second electrode is formed at the resin insulating part, and thus a space in which the resin insulating part does not exist or a material different from the resin insulating part is provided between the first electrode and the second electrode.

A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, antenna elements and a first insulating film. The insulating encapsulant is encapsulating the at least one semiconductor die, the insulating encapsulant has a first surface and a second surface opposite to the first surface. The first redistribution layer is disposed on the first surface of the insulating encapsulant. The second redistribution layer is disposed on the second surface of the insulating encapsulant. The antenna elements are located over the second redistribution layer. The first insulating film is disposed in between the second redistribution layer and the antenna elements, wherein the first insulating film comprises a resin rich region and a filler rich region, the resin rich region is located in between the filler rich region and the second redistribution layer and separating the filler rich region from the second redistribution layer.

This application discloses a chip package assembly, an electronic device, and a preparation method of a chip package assembly. The chip package assembly includes a package substrate, a chip, and a heat dissipation part. The package substrate includes an upper conductive layer, a lower conductive layer, and a conductive part connected between the upper conductive layer and the lower conductive layer. The chip includes a front electrode and a back electrode that are disposed opposite each other, the chip is embedded in the package substrate, the conductive part surrounds the chip, the front electrode is connected to the lower conductive layer, and the back electrode is connected to the upper conductive layer. The heat dissipation part is connected to a surface of the upper conductive layer that is away from the chip. The upper conductive layer, the lower conductive layer, and the conductive part each conduct heat.