A semiconductor device assembly and associated methods are disclosed herein. The semiconductor device assembly includes (1) a substrate having a first side and a second side opposite the first side; (2) a first set of stacked semiconductor devices at the first side of the substrate; (3) a second set of stacked semiconductor devices adjacent to one side of the first set of stacked semiconductor devices; (4) a third set of stacked semiconductor devices adjacent to an opposite side of the first set of stacked semiconductor devices; and (5) a temperature adjusting component at the second side and aligned with the second set of stacked semiconductor devices. The temperature adjusting component is positioned to absorb the thermal energy and thereby thermally isolate the second set of stacked semiconductor devices from the first set of stacked semiconductor devices.

An object of the present invention is to provide a semiconductor device in which the effect of dimensional tolerance can be reduced, and a method for manufacturing the same. The semiconductor device according to the present invention includes: a plurality of cooling plates each having a coolant passage inside; spacers disposed to stack the cooling plates with spaces; at least one semiconductor package disposed on at least one principal surface of at least one of the cooling plates; and a spring plate disposed between adjacent ones of the cooling plates, the spring plate biasing the at least one semiconductor package toward the cooling plates.

The waterproof casing has a housing and a grommet. The grommet is disposed in a hole of the housing. The grommet has a body, a flange, and a lip. The flange extends radially outward from the body. The lip protrudes from an outer peripheral part of the body and extends in a circumferential direction. The lip has a high compression portion in contact with a wall surface of the hole and a low compression portion adjacent to the high compression portion at a further side from the flange. The low compression portion has a lower compressed state than the high compression portion. The housing has a recess to allow the low compression portion to escape radially outward.

A semiconductor die is provided. The semiconductor die includes a plurality of transistors arranged at a front side of a semiconductor substrate and an electrically conductive structure and a trench extending from a backside of the semiconductor substrate into the semiconductor substrate. A length of the trench is equal or larger than a lateral dimension of the semiconductor substrate.

A semiconductor device includes a die, an encapsulant over a front-side surface of the die, a redistribution structure on the encapsulant, a thermal module coupled to the back-side surface of the die, and a bolt extending through the redistribution structure and the thermal module. The die includes a chamfered corner. The bolt is adjacent to the chamfered corner.

Interconnect structures with improved conductive properties are disclosed herein. In one embodiment, an interconnect structure can include a first conductive member coupled to a first semiconductor die and a second conductive member coupled to second semiconductor die. The first conductive member includes a recessed surface defining a depression. The second conductive member extends at least partially into the depression of the first conductive member. A bond material within the depression can at least partially encapsulate the second conductive member and thereby bond the second conductive member to the first conductive member.

Readily modifiable and customizable, low-area overhead interconnect structures for forming connections between a system-in-a-package module and other components in an electronic device. One example may provide an interposer for providing an interconnection between a system-in-a-package module and other components in an electronic device. Another may provide a plurality of conductive pins or contacts to form interconnect paths between a module and other components.

A semiconductor module of an electric power converter includes an IGBT and a MOSFET which are connected in parallel to each other and provided on the same lead frame, either one of the IGBT and the MOSFET is a first switching element and the remaining one is a second switching element, and the conduction path of the second switching element is disposed at a position that is separated from a conduction path of the first switching element in the same lead frame.

A power conversion apparatus performs power conversion. The power conversion apparatus includes a semiconductor module and a cooler. The semiconductor module includes an insulated-gate bipolar transistor, a metal-oxide-semiconductor field-effect transistor, and a lead frame. The insulated-gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor are connected in parallel to each other and provided on the same lead frame. The cooler has a coolant flow passage. The coolant flow passage extends such that the coolant flow passage and the lead frame of the semiconductor module are opposed to each other. The semiconductor module is configured such that the metal-oxide-semiconductor field-effect transistor is not disposed further downstream than the insulated-gate bipolar transistor in a flow direction of a coolant in the coolant flow passage of the cooler.

A semiconductor module including a semiconductor element, a controller, a cooler, and a temperature sensor are included. The controller is connected to the semiconductor module and controls switching operation of the semiconductor element. The temperature sensor measures a coolant temperature, which is a temperature of the coolant. The controller controls turn-off speed of the semiconductor element based on the coolant temperature. The controller increases the turn-off speed as the coolant temperature rises.