A semiconductor device includes a substrate, a conductive part, a controller module and a sealing resin. The substrate has a substrate obverse surface and a substrate reverse surface facing away from each other in a z direction. The conductive part is made of an electrically conductive material on the substrate obverse surface. The controller module is disposed on the substrate obverse surface and electrically connected to the conductive part. The sealing resin covers the controller module and at least a portion of the substrate. The conductive part includes an overlapping wiring trace having an overlapping portion overlapping with the electronic component as viewed in the z direction. The overlapping portion of the overlapping wiring trace is not electrically bonded to the controller module.

In a general aspect, a method for producing a semiconductor device assembly can include defining a cavity in a conductive spacer, and electrically and thermally coupling a semiconductor die with the conductive spacer, such that the semiconductor die is at least partially embedded in the cavity. The semiconductor die can have a first surface having active circuitry included therein, a second surface opposite the first surface, and a plurality of side surfaces each extending between the first surface of the semiconductor die and the second surface of the semiconductor die. The method can also include electrically coupling a direct bonded metal (DBM) substrate with the first surface of the semiconductor die.

In one form, a method of manufacturing a circuit device comprises providing a lead frame comprising a plurality of leads, each comprising an island portion, a bonding portion elevated from the island portion, a slope portion extending obliquely so as to connect the island portion and the bonding portion, and a lead portion extending from the bonding portion. First and second transistors and first and second diodes are mounted upper surfaces of island portions of respective first and second leads, and are connected to the respective leads through wirings that connect the transistors and diodes to the bonding portions of the respective leads. Lower surfaces of the island portions are attached to an upper surface of a circuit board, and the circuit board, the transistors, the diodes, and the lead frame are encapsulated by a resin, so that the lead portions are not covered by the resin.

A semiconductor device includes a lead frame comprising a first terminal and a second terminal for grounding, a sealing resin which covers the lead frame, an exposed part which is a part of the second terminal and is exposed from the sealing resin and a conductive material which covers the surface of the sealing resin and contacts the second terminal at the exposed part.

A semiconductor device A1 disclosed includes: a semiconductor element 10 having an element obverse face and element reverse face that face oppositely in a thickness direction z, with an obverse-face electrode 11 (first electrode 111) and a reverse-face electrode 12 respectively formed on the element obverse face and the element reverse face; a conductive member 22A opposing the element reverse face and conductively bonded to the reverse-face electrode 12; a conductive member 22B spaced apart from the conductive member 22A and electrically connected to the obverse-face electrode 11; and a lead member 51 having a lead obverse face 51a facing in the same direction as the element obverse face and connecting the obverse-face electrode 11 and the conductive member 22B. The lead member 51, bonded to the obverse-face electrode 11 via a lead bonding layer 321, includes a protrusion 521 protruding in the thickness direction z from the lead obverse face 51a. The protrusion 521 overlaps with the obverse-face electrode 11 as viewed in the thickness direction z. This configuration suppresses deformation of the connecting member to be pressed during sintering treatment.

A dual-side cooling (DSC) semiconductor package includes a first metal-insulator-metal (MIM) substrate having a first insulator layer, first metallic layer, and second metallic layer. A second MIM substrate includes a second insulator layer, third metallic layer, and fourth metallic layer. The third metallic layer includes a first portion having a first contact area and a second portion, electrically isolated from the first portion, having a second contact area. A semiconductor die is coupled with the second metallic layer and is directly coupled with the third metallic layer through one or more solders, sintered layers, electrically conductive tapes, solderable top metal (STM) layers, and/or under bump metal (UBM) layers. The first contact area is electrically coupled with a first electrical contact of the die and the second contact area is electrically coupled with a second electrical contact of the die. The first and fourth metallic layers are exposed through an encapsulant.

A semiconductor device includes a substrate that includes an opening extending through a thickness of the substrate, a frame that includes an integrated circuit (IC) die pad in the opening and a plurality of arms extending outwardly from the IC die pad, an IC mounted on the IC die pad, a plurality of bonding elements electrically coupling the substrate with the IC without the frame being an intermediary coupling element, and an encapsulant surrounding the IC, the plurality of bonding elements, and the plurality of arms. The substrate has a first major surface and a second major surface. Each arm is devoid of a contact pad. Each arm has a distal end coupled to the first major surface of the substrate, and each arm has a proximal end disposed over the first major surface of the substrate.

A power module includes a metal frame having a first and second device attach pads, first and second semiconductor packages each having an encapsulant body, a die pad exposed at a lower surface of the encapsulant body, a plurality of leads protruding out from the encapsulant body, and a potting compound that encapsulates both of the first and second semiconductor packages and partially covers the metal frame. The first semiconductor package is mounted on the metal frame such that the die pad of the first semiconductor package faces and electrically contacts the first device attach pad. The second semiconductor package is mounted on the metal frame such that the die pad of the second semiconductor package faces and electrically contacts the second device attach pad. The plurality of leads from each of the first and second semiconductor packages are electrically accessible from outside of the potting compound.

A method of manufacturing a semiconductor device is provided. The method includes attaching a first end of a first bond wire to a first conductive lead and a second end of the first bond wire to a first bond pad of a first semiconductor die. A conductive lead extender is affixed to the first conductive lead by way of a conductive adhesive, the lead extender overlapping the first end of the first bond wire. A first end of a second bond wire is attached to the lead extender, the first end of the second bond wire conductively connected to the first end of the first bond wire.

A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.