A semiconductor device includes a substrate having an upper surface and a lower surface, a metal layer provided on the lower surface of the substrate, a semiconductor element including first electrodes provided on the upper surface of the substrate, connected to the metal layer via through holes penetrating the substrate, and electrically separated from each other on the upper surface of the substrate, second electrodes provided on the upper surface of the substrate and alternately provided with the first electrodes, and a first pad provided on the upper surface of the substrate and to which the second electrodes are connected, and a protective film provided on the upper surface of the substrate to cover the first electrodes and the second electrodes, having a first opening that exposes at least a part of the first pad, and having no opening that overlaps the first electrodes.

A semiconductor device includes a substrate having an upper surface and a lower surface, a metal layer provided on the lower surface of the substrate, a semiconductor element including first electrodes provided on the upper surface of the substrate, connected to the metal layer via through holes penetrating the substrate, and electrically separated from each other on the upper surface of the substrate, second electrodes provided on the upper surface of the substrate and alternately provided with the first electrodes, and a first pad provided on the upper surface of the substrate and to which the second electrodes are connected, and a protective film provided on the upper surface of the substrate to cover the first electrodes and the second electrodes, having a first opening that exposes at least a part of the first pad, and having no opening that overlaps the first electrodes.

A semiconductor package includes a semiconductor die and an encapsulant layer. A mark is formed on a surface of the encapsulant layer. A damage barrier layer is disposed between the mark and the semiconductor die. The damage barrier layer blocks the propagation of laser light used to form the mark from reaching the semiconductor die.

A semiconductor package includes a semiconductor die and an encapsulant layer. A mark is formed on a surface of the encapsulant layer. A damage barrier layer is disposed between the mark and the semiconductor die. The damage barrier layer blocks the propagation of laser light used to form the mark from reaching the semiconductor die.

A light-receiving device includes: a first chip having a pixel region in which a sensor pixel is provided; a second chip including a processing circuit that performs signal processing on a sensor signal outputted from the sensor pixel, the second chip being stacked on the first chip; and a first alignment mark provided in the pixel region of the first chip to correspond to a second alignment mark provided in the second chip.

A light-receiving device includes: a first chip having a pixel region in which a sensor pixel is provided; a second chip including a processing circuit that performs signal processing on a sensor signal outputted from the sensor pixel, the second chip being stacked on the first chip; and a first alignment mark provided in the pixel region of the first chip to correspond to a second alignment mark provided in the second chip.

A method of forming a semiconductor device is provided. The method includes providing a substrate having a first region and a second region; forming a plurality of trenches in the first region of the substrate; forming a multi-layer stack over the substrate and in the trenches; and patterning the multi-layer stack and the substrate to form first nanostructures over first fins in the first region and second nanostructures over second fins in the second region, where the multi-layer stack includes at least one of first semiconductor layers and at least one of second semiconductor layer stacked alternately, and the plurality of trenches are in corresponding ones of the first fins.

A method of forming a semiconductor device is provided. The method includes providing a substrate having a first region and a second region; forming a plurality of trenches in the first region of the substrate; forming a multi-layer stack over the substrate and in the trenches; and patterning the multi-layer stack and the substrate to form first nanostructures over first fins in the first region and second nanostructures over second fins in the second region, where the multi-layer stack includes at least one of first semiconductor layers and at least one of second semiconductor layer stacked alternately, and the plurality of trenches are in corresponding ones of the first fins.

A wafer producing method includes a peel-off layer forming step of forming a peel-off layer by positioning a focused spot of a laser beam having a wavelength transmittable through an ingot to a depth corresponding to a thickness of the wafer to be produced from the ingot from a first end surface of the ingot and applying the laser beam to the ingot, a first chamfered portion forming step of forming a first chamfered portion by applying, from the first end surface side to a peripheral surplus region of the wafer, a laser beam having a wavelength absorbable by the wafer, a peeling-off step of peeling off the wafer to be produced, and a second chamfered portion forming step of forming a second chamfered portion by applying, from a peel-off surface side of the wafer, the laser beam having a wavelength absorbable by the wafer.

A semiconductor package and a method of forming the same are provided. The semiconductor package includes: a semiconductor substrate having a front side and a back side, the semiconductor substrate having a chip area and a dummy area; a front structure below the front side, and including an internal circuit, an internal connection pattern, a guard pattern, and a front insulating structure; a rear protective layer overlapping the chip area and the dummy area, and a rear protrusion pattern on the rear protective layer and overlapping the dummy area, the rear protective layer and the rear protrusion pattern being on the back side; a through-electrode structure penetrating through the chip area and the rear protective layer, and electrically connected to the internal connection pattern; and a rear pad electrically connected to the through-electrode structure. The internal circuit and the internal connection pattern are below the chip area, and the guard pattern is below the chip area adjacent to the dummy area.