Disclosed herein is a method comprising: forming a first electrically conductive layer on a first surface of a substrate of semiconductor, wherein the first electrically conductive layer is in electrical contact with the semiconductor; bonding, at the first electrically conductive layer, a support wafer to the substrate of semiconductor; thinning the substrate of semiconductor.

A light emitting device including a substrate, a first conductivity-type semiconductor layer, a mesa including a second conductivity-type semiconductor layer and an active layer, first and second contact electrodes respectively contacting the first and second conductivity-type semiconductor layers, a passivation layer covering the first and second contact electrodes, the mesa, and including first and second openings, and first and second bump electrodes electrically connected to the first and second contact electrodes through the first and second openings, respectively, in which the first and second bump electrodes are disposed on the mesa, the passivation layer is disposed between the first bump electrode and the second contact electrode, the first contact electrode includes a reflective material, and a portion of the first opening is surrounded with a side surface of the mesa, and another portion of the first opening is not surrounded with the side surface of the mesa.

A solder bump forming member including: a base substrate having a plurality of recesses; and solder particles in the recesses, in which the solder particle has an average particle diameter of 1 to 35 μm and a C.V. value of 20% or less, and a part of the solder particle projects from the recess, or in cross-sectional view, when a depth of the recess is designated as H.sub.1, and a height of the solder particle is designated as H.sub.2, H.sub.1<H.sub.2 is established.

Provided is a method for manufacturing a conductive pillar capable of bonding a substrate and a bonding member with high bonding strength via a bonding layer without employing an electroplating method, and a method for manufacturing a bonded structure by employing this method. A method for manufacturing a conductive pillar 1 includes, in sequence, the steps of forming a resist layer 16 on a substrate 11 provided with an electrode pad 13, the resist layer 16 including an opening portion 16a on the electrode pad 13, forming a thin Cu film 17 by sputtering or evaporating Cu on a surface of the substrate 11 provided with the resist layer 16 including the opening portion 16a, filling the opening portion 16a with a fine particle copper paste 12c, and sintering the fine particle copper paste 12c by heating the substrate 11 filled with the fine particle copper paste 12c.

A die attach system is provided. The die attach system includes: a support structure for supporting a substrate; a die supply source including a plurality of die for attaching to the substrate; and a bond head for bonding a die from the die supply source to the substrate, the bond head including a bond tool having a contact portion for contacting the die during a transfer from the die supply source to the substrate, the bond head including a spring portion engaged with the bond tool such that the spring portion is configured to compress during pressing of the die against the substrate using the contact portion of the bond tool.

Methods of coupling inductors in an IC device using interconnecting elements with solder caps and the resulting device are disclosed. Embodiments include forming a top inductor structure, in a top inductor area on a lower surface of a top substrate, the top inductor structure having first and second top terminals at its opposite ends; forming a bottom inductor structure, in a bottom inductor area on an upper surface of a bottom substrate, the bottom inductor structure having first and second bottom terminals at its opposite ends; forming top interconnecting elements on the lower surface of the top substrate around the top inductor area; forming bottom interconnecting elements on the upper surface of the bottom substrate around the bottom inductor area; forming solder bumps on lower and upper surfaces, respectively, of the top and bottom interconnecting elements; and connecting the top and bottom interconnecting elements to each other.

Disclosed herein are cavity structures in integrated circuit (IC) package supports, as well as related methods and apparatuses. For example, in some embodiments, an IC package support may include: a cavity in a dielectric material, wherein the cavity has a bottom and sidewalls; conductive contacts at the bottom of the cavity, wherein the conductive contacts include a first material; a first peripheral material outside the cavity, wherein the first peripheral material is at the sidewalls of the cavity and proximate to the bottom of the cavity, and the first peripheral material includes the first material; and a second peripheral material outside the cavity, wherein the second peripheral material is at the sidewalls of the cavity and on the first peripheral material, and the second peripheral material is different than the first peripheral material.

In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.

A method of forming an assembly is provided. The method includes attaching a packaged semiconductor device to a substrate. An isolation structure is formed and located between the packaged semiconductor device and the substrate. An underfill material is dispensed between the packaged semiconductor device and the substrate. The isolation structure prevents the underfill material from contacting a first conductive connection formed between the packaged semiconductor device and the substrate.

Microelectronic assemblies, related devices, and methods are disclosed herein. In some embodiments, a microelectronic assembly may include a die having a first surface and an opposing second surface; a capacitor having a surface, wherein the surface of the capacitor is coupled to the first surface of the die; and a conductive pillar coupled to the first surface of the die. In some embodiments, a microelectronic assembly may include a capacitor in a first dielectric layer; a conductive pillar in the first dielectric layer; a first die having a surface in the first dielectric layer; and a second die having a surface in a second dielectric layer, wherein the second dielectric layer is on the first dielectric layer, and wherein the surface of the second die is coupled to the capacitor, to the surface of the first die, and to the conductive pillar.