A semiconductor device includes first and second chips that are stacked such that first surfaces of their element layers face each other. Each chip has a substrate, an element layer on a first surface of the substrate, pads on the element layer, and vias that penetrate through the substrate and the element layer. Each via is exposed from a second surface of the substrate and directly connected to one of the pads. The vias include a first via of the first chip directly connected to a first pad of the first chip and a second via of the second chip directly connected to a second pad of the second chip. The pads further include a third pad of the second chip which is electrically connected to the second pad by a wiring in the element layer of the second chip and to the first pad through a micro-bump.

Microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a packaged microelectronic device can include an interposer substrate with a plurality of interposer contacts. A microelectronic die is attached and electrically coupled to the interposer substrate. The device further includes a casing covering the die and at least a portion of the interposer substrate. A plurality of electrically conductive through-casing interconnects are in contact with and projecting from corresponding interposer contacts at a first side of the interposer substrate. The through-casing interconnects extend through the thickness of the casing to a terminus at the top of the casing. The through-casing interconnects comprise a plurality of filaments attached to and projecting away from the interposer contacts in a direction generally normal to the first side of the interposer substrate.

A light source device including a substrate, a plurality of first light emitting diode (LED) chips, and at least one second LED chip is provided. The substrate has an upper surface. The plurality of first LED chips are disposed on the upper surface and electrically connected to the substrate. Each of the first LED chips includes a first chip substrate, a first semiconductor layer, and a plurality of first electrodes, and the first electrodes are disposed on the upper surface of the substrate. The second LED chip is disposed on the upper surface and electrically connected to the substrate. The second LED chip includes a second chip substrate, a second semiconductor layer, and a plurality of second electrodes. A thickness of the second chip substrate is different from than a thickness of the first chip substrate, and the second electrodes are disposed on the upper surface of the substrate.

Embodiments of mechanisms for forming a package are provided. The package includes a substrate and a contact pad formed on the substrate. The package also includes a conductive pillar bonded to the contact pad through solder formed between the conductive pillar and the contact pad. The solder is in direct contact with the conductive pillar.

A method includes forming an interconnect component including a plurality of dielectric layers that include an organic dielectric material, and a plurality of redistribution lines extending into the plurality of dielectric layers. The method further includes bonding a first package component and a second package component to the interconnect component, encapsulating the first package component and the second package component in an encapsulant, and precutting the interconnect component using a blade to form a trench. The trench penetrates through the interconnect component, and partially extends into the encapsulant. The method further includes performing a singulation process to separate the first package component and the second package component into a first package and a second package, respectively.

A stacked module arrangement includes: a first molded electronic module; a second molded electronic module; and an interface by which the first molded electronic module and the second molded electronic module are physically and electrically connected to one another in a stacked configuration. The first molded electronic module is a power electronic module having a maximum breakdown voltage of at least 40 V and a maximum DC current of at least 10 A.

A power device for surface mounting has a leadframe including a die-attach support and at least one first lead and one second lead. A die, of semiconductor material, is bonded to the die-attach support, and a package, of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support and has a package height. The first and second leads have outer portions extending outside the package, from two opposite lateral surfaces of the package. The outer portions of the leads have lead heights greater than the package height, extend throughout the height of the package, and have respective portions projecting from the first base.

A power module (10) and a manufacturing method thereof are disclosed. The power module (10) includes a power assembly (11) and a drive board (12). The power assembly (11) includes a substrate (111), a power chip (112), and a package body (113). The power chip (112) is disposed on a mounting surface (1110) of the substrate (111). The package body (113) packages the power chip (112) on the substrate (111). The drive board (12) is disposed in the package body (113) and is located on a side, of the power chip (112), that backs the mounting surface (1110). The drive board (12) is electrically connected to the power chip (112). In the power module, a parasitic parameter between the drive board (12) and the power assembly (11) can be reduced, thereby improving electrical performance of the power module (10).

Disclosed is a semiconductor article including: a metal bus bar and a metal heat sink wherein at least a portion of a first side of the metal bus bar is bonded to at least a portion of the metal heat sink by a polyimide layer without adhesive; and a semiconductor power device disposed on a second side of the metal bus bar.

Disclosed are an electronic component package, an electronic assembly, and a voltage regulation module. The electronic component package includes a substrate and a first electronic component. The substrate includes a first surface and a second surface; wherein the first surface is arranged with a first conductive layer, and the second surface is arranged with a second conductive layer. The substrate defines a first conductive hole connected to the first conductive layer and a second conductive hole connected to the second conductive layer. The first electronic component is received in the substrate and arranged with a first electrical connection terminal and a second electrical connection terminal; the first electrical connection terminal is connected to the first conductive layer through the first conductive hole, and the second electrical connection terminal is connected to the second conductive layer through the second conductive hole. The first electronic component is a passive electronic component.