Provided are a solid-state imaging apparatus, a method for manufacturing a solid-state imaging apparatus, and an electronic apparatus equipped with a solid-state imaging apparatus that can reduce the size of a semiconductor chip in such a way that one semiconductor substrate having a logic circuit controls two sensors. Provided is a solid-state imaging apparatus including a first sensor, a first semiconductor substrate having a memory, a second semiconductor substrate having a logic circuit, and a second sensor, in which the first sensor, the first semiconductor substrate, the second semiconductor substrate, and the second sensor are arranged in this order.

A semiconductor device, including a semiconductor module, a positioning member and a printed board. The semiconductor module includes a case that stores a semiconductor chip, a plurality of external terminals electrically connected to the semiconductor chip and extending upward from a front surface of the case, and a reference pin extending upward from the front surface of the case. The positioning member has a reference hole and a plurality of supporting holes penetrating therethrough. The printed board including a plurality of terminal holes that respectively correspond to the plurality of external terminals. The printed board is disposed on the front surface of the case via the positioning member. The plurality of external terminals of the semiconductor module are respectively attached to the plurality of terminal holes.

An LED board includes a flexible printed circuit and multiple LED-mounted parts arrayed on the circuit board at regular intervals in a constant direction. The LED-mounted parts each include multiple LEDs. The circuit board includes LED portions including the LED-mounted parts and non-LED portions including no LED-mounted parts that are arrayed alternately. The LED-mounted parts each have, in an array direction in which the LED-mounted parts are arrayed, a dimension equal to an interval between adjacent LED-mounted parts of the arrayed LED-mounted parts. A surface emitter includes multiple LED boards fitted together, with LED-mounted parts on each LED board overlapping non-LED portions of an adjacent LED board of the LED boards. The LED board and the surface emitter with the above structures easily upsize a video display device.

An electronic package is provided, in which a first electronic element and a second electronic element are disposed on a first side of a circuit structure and a second side of the circuit structure, respectively, where a first metal layer is formed between the first side of the circuit structure and the first electronic element, a second metal layer is formed on a surface of the second electronic element, and at least one thermally conductive pillar is disposed on the second side of the circuit structure and extends into the circuit structure to thermally conduct the first metal layer and the second metal layer. Therefore, through the thermally conductive pillar, heat generated during operations of the first electronic element and the second electronic element can be quickly dissipated to an external environment and would not accumulate.

A semiconductor device includes first semiconductor chips that each include a first control electrode and a first output electrode, second semiconductor chips each include a second control electrode and a second output electrode, first and second input circuit patterns on which the first and second input electrodes are disposed, respectively, first and second control circuit patterns electrically connected to the first and second control electrodes, respectively, first and second resistive elements, and a first inter-board wiring member. The first control electrodes and first resistive element are electrically connected via the first control circuit pattern, the second control electrodes and second resistive element are electrically connected via the second control circuit pattern, and at least one of the first output electrodes and at least one of the second output electrodes are electrically connected to each other via the first inter-board wiring member.

Provided are package-on-package (POP)-type semiconductor packages including a lower package having a first size and including a lower package substrate in which a lower semiconductor chip is, an upper redistribution structure on the lower package substrate and the lower semiconductor chip, and alignment marks. The packages may also include an upper package having a second size smaller than the first size and including an upper package substrate and an upper semiconductor chip. The upper package substrate may be mounted on the upper redistribution structure of the lower package and electrically connected to the lower package, and the upper semiconductor chip may be on the upper package substrate. The alignment marks may be used for identifying the upper package, and the alignment marks may be below and near outer boundaries of the upper package on the lower package.

An electrostatic discharge (ESD), protection device is provided. In accordance with the present disclosure, an ESD protection device is provided that includes a series connection of a first unit having strong snapback and low series capacitance and a second high-voltage unit that displays a relatively high holding/trigger voltage to ensure latch up and improper triggering of the ESD protection device while at the same time providing high-voltage operation with low capacitive loading.

A first circuit board includes a positive output pin and a negative output pin of a power conversion circuit, each of which has a shape projecting from a second main surface. A second circuit board has a positive through via and a negative through via, each of which has a shape extending between a third main surface and a fourth main surface. The second main surface of the first circuit board and the third main surface of the second circuit board are physically in close contact with each other. The positive output pin is inserted through the positive through via to reach the fourth main surface. The negative output pin is inserted through the negative through via in such a manner as to reach the fourth main surface. The load receives a current supplied from the power conversion circuit through the positive output pin and the negative output pin.

An atmospheric water generation system absorbs water from an atmospheric air stream into a desiccant flowing along a flow path of a closed desiccant circulation loop. To ensure that the desiccant remains within the closed desiccant circulation loop, the atmospheric water generation system encompasses a membrane-based water extraction device that the desiccant flows through. The desiccant flows through the membrane-based water extraction device on a first side of a membrane, and the membrane separates the desiccant from a water-collection flow. Water absorbed into the desiccant passes from the desiccant, through the porous membrane, and into the water-collection flow, at least in part due to differences in temperature and/or pressure characteristics of the water flow and the desiccant flow. Water collected within the water-collection flow is directed to a storage tank for usage.

A semiconductor package structure includes a substrate, a first redistribution layer, a semiconductor die, a silicon capacitor, and a first bump structure. The first redistribution layer is disposed over the substrate. The semiconductor die is disposed over the first redistribution layer. The silicon capacitor is disposed below the first redistribution layer and is electrically coupled to the semiconductor die, wherein the silicon capacitor includes a semiconductor substrate and a plurality of capacitor cells embedded in the semiconductor substrate. The first bump structure is disposed between the silicon capacitor and the substrate.