A power semiconductor module includes a substrate with a metallization layer that is structured. A semiconductor chip having a first side bonded to the metallization layer. A metal clip, which is a strip of metal, has a first planar part bonded to a second side of the semiconductor chip opposite to the first side. The metal clip also has a second planar part bonded to the metallization layer. A mold encapsulation at least partially encloses the substrate and the metal clip. The mold encapsulation has a recess approaching towards the first planar part of the metal clip. The semiconductor chip is completely enclosed by the mold encapsulation, the substrate and the metal clip and the first planar part of the metal clip is at least partially exposed by the recess. A sensor is accommodated in the recess.

A semiconductor package includes: a first wiring structure including a first wiring layer, and a second wiring layer disposed on the first wiring layer, and connected to a first connecting structure placed disposed on the first wiring layer; a first semiconductor chip disposed on the first wiring structure and connected to the first wiring structure through a first connecting pad disposed on a first side of the first semiconductor chip; a second wiring structure disposed on the first semiconductor chip; and an insulating member disposed between the first and second wiring structures, wherein the first wiring structure further includes a first signal pattern that is electrically connected to the first connecting pad, and the first signal pattern redistributes the first connecting pad to the first connecting structure via the insulating member.

A pressure sensor element and a receiving circuit are formed on an IC chip. A transmitting circuit and a piezoelectric element of an actuator are respectively formed on a transmitting chip and a piezoelectric chip. The piezoelectric chip and the pressure sensor face each other separated by a distance in an airtight first space surrounded by a package main body and a base substrate. Dielectric breakdown voltage of signal transmission from the primary side to the secondary side is set by the distance. The first space is a pressure propagation region including an insulating medium capable of transmitting vibrations of the piezoelectric element as pressure. The signal transmission is performed with high insulation by the pressure generated in the pressure propagation region between components integrated in a single module by insulating the primary side and the secondary side from each other by the insulating medium of the pressure propagation region.

A printed circuit board may include a substrate body portion, conductive patterns on a top surface of the substrate body portion, and a photosensitive insulating layer on the top surface of the substrate body portion and including an opening exposing at least one of the conductive patterns. The photosensitive insulating layer includes first to third sub-layers stacked sequentially. The first sub-layer includes an amine compound or an amide compound A refractive index of the second sub-layer is lower than a refractive index of the third sub-layer. A photosensitizer content of the second sub-layer is higher than a photosensitizer content of the third sub-layer.

A semiconductor device includes a switching element, a control circuit, and a first and second temperature detectors. The control circuit controls the switching element and have an overcurrent detection circuit for the switching element. The first temperature detector detects the temperature of the switching element and the second temperature detector detects the temperature of the control circuit. The control circuit includes a reference correction circuit for correcting an overcurrent reference value of the overcurrent detection circuit on the basis of a first detection value and a second detection value detected by the first and second temperature detectors and outputting a corrected overcurrent reference value.

A light emitting device and a light emitting module both having narrow spacing between emission faces, as well as a method of manufacturing light emitting device and a method of manufacturing light emitting module are provided.

A light emitting device 100 includes element structure bodies 15, at least one of the element structure bodies including a submount substrate 10, a light emitting element 20 disposed on the submount substrate 10, a light transmitting member 30 disposed on the light emitting element 20, and a first cover member 50 covering the lateral faces of the light emitting element 20 on the submount substrate 10, and a second cover member 60 supporting the element structure bodies 15 by covering the lateral faces of the element structure bodies 15.

A display device includes a circuit board and a plurality of light-emitting units disposed on the circuit board. The circuit board includes a substrate and a plurality of signal lines disposed on the substrate. Each light-emitting unit includes a base board, at least one light-emitting element and a driving circuit layer. The light-emitting element is between the base board and the substrate. The driving circuit layer is between the light-emitting element and the base board, and electrically connected to the light-emitting element and the signal line.

A radio frequency package includes a baseband processor, a transceiver, and a memory. The baseband processor performs processing for wireless communication functions. Moreover, the transceiver transmits and receives wireless signals based on the processing of the wireless communication functions. Additionally, the memory is associated with the baseband processor and stores instructions for performing the processing. The memory and the baseband processor are disposed on top of the transceiver.

A power chip includes: a first power switch, formed in a wafer region and having a first and a second metal electrodes; a second power switch, formed in the wafer region and having a third and a fourth metal electrodes, wherein the first and second power switches respectively constitute an upper bridge arm and a lower bridge arm of a bridge circuit, and the first and second power switches are alternately arranged; and a metal region, at least including a first metal layer and a second metal layer that are stacked, each metal layer including a first to a third electrodes, and electrodes with the same voltage potential in the metal layers are electrically coupled.

A semiconductor package includes a wiring structure that includes a first insulating layer and a first conductive pattern inside the first insulating layer, a first semiconductor chip disposed on the wiring structure, an interposer that includes a second insulating layer, a second conductive pattern inside the second insulating layer, and a recess that includes a first sidewall formed on a first surface of the interposer that faces the first semiconductor chip and a first bottom surface connected with the first sidewall, where the recess exposes at least a portion of the second insulating layer, a first element bonded to the interposer and that faces the first semiconductor chip inside the recess, and a mold layer that covers the first semiconductor chip and the first element.