A method of fabricating a bridged multi-chip assembly structure includes providing a carrier substrate. The method further includes arranging a plurality of chips on the carrier substrate in a predetermined layout. Each chip has a front surface including a set of terminals formed thereon. The method further includes depositing a molding material between the plurality of chips and on the carrier substrate. The method further includes removing the carrier substrate from the plurality of chips fixed by the molding material. The method further includes bonding a bridge chip to corresponding sets of terminals of at least two chips of the plurality of chips fixed by the molding material.

A display device including: a substrate including pixel electrodes; a passivation layer on the substrate, a groove in the passivation layer between the pixel electrodes;

contact electrodes on the pixel electrodes; and a light-emitting element layer comprising a plurality of light-emitting elements respectively bonded onto the contact electrodes and having a plurality of semiconductor layers thereon. The groove does not overlap the plurality of light-emitting elements.

A display device including: a substrate including pixel electrodes; a passivation layer on the substrate, a groove in the passivation layer between the pixel electrodes;

contact electrodes on the pixel electrodes; and a light-emitting element layer comprising a plurality of light-emitting elements respectively bonded onto the contact electrodes and having a plurality of semiconductor layers thereon. The groove does not overlap the plurality of light-emitting elements.

A method for manufacturing a fin-integrated semiconductor module includes: clamping a fin-integrated heat-dissipation base using a level different jig while making the heat-dissipation base vary in height; and soldering a semiconductor assembly onto the heat-dissipation base. A semiconductor module includes a fin-integrated heat-dissipation base and a semiconductor assembly provided on the heat-dissipation base. A bending width of the heat-dissipation base is 200 μm or less.

A method for manufacturing a fin-integrated semiconductor module includes: clamping a fin-integrated heat-dissipation base using a level different jig while making the heat-dissipation base vary in height; and soldering a semiconductor assembly onto the heat-dissipation base. A semiconductor module includes a fin-integrated heat-dissipation base and a semiconductor assembly provided on the heat-dissipation base. A bending width of the heat-dissipation base is 200 μm or less.

A discrete three-dimensional (3-D) processor comprises first and second dice. The first die comprises 3-D random-access memory (3D-RAM) arrays, whereas the second die comprises logic circuits and at least an off-die peripheral-circuit component of the 3D-RAM arrays. The first die does not comprise the off-die peripheral-circuit component of the 3D-RAM arrays.

A discrete three-dimensional (3-D) processor comprises first and second dice. The first die comprises 3-D random-access memory (3D-RAM) arrays, whereas the second die comprises logic circuits and at least an off-die peripheral-circuit component of the 3D-RAM arrays. The first die does not comprise the off-die peripheral-circuit component of the 3D-RAM arrays.

An object of the present disclosure is to provide a trench gate type power semiconductor device that does not easily break even when stress is applied. A SiC-MOSFET includes a SiC substrate, a drift layer of a first conductive type, formed on the SiC substrate, a base region of a second conductivity type formed in a surface layer of the drift layer, a source region of the first conductivity type selectively formed in a surface layer of the base region, a trench extending through the base region and the source region and reaching the drift layer, a gate electrode embedded in the trench and having a V-shaped groove on an upper surface thereof, and an oxide film formed on an upper surface including the groove of the gate electrode, in which a bottom of the V-shape groove is deeper than the base region.

A metal base plate is rectangular in plan view, has a joining region set on a front surface, and has a center line, which is parallel to a pair of short sides that face each other, set in a middle interposed between the pair of short sides. A ceramic circuit board includes a ceramic board that is rectangular in plan view, a circuit pattern that is formed on a front surface of the ceramic board and has a semiconductor chip joined thereto, and a metal plate that is formed on a rear surface of the ceramic board and is joined to the joining region by solder. Here, the solder contains voids and is provided with a stress relieving region at one edge portion that is away from the center line. A density of voids included in the stress relieving region is higher than other regions of the solder.

In certain aspects, a semiconductor device includes a substrate, a first trench isolation in the substrate, a second trench isolation in the substrate and surrounding a portion of the substrate, and a first routing electrode layer extending through the first trench isolation. The portion of the substrate is an active region of a transistor.