Embodiments disclosed herein may relate to forming a base contact layout in a memory device.

An IGBT module, a conductor installing structure for the IGBT module and an inverter are provided. The conductor installing structure for the IGBT module includes a substrate, a conductor and an insulation sleeve sleeved on the conductor and insulatedly isolating the conductor from the substrate. In the conductor installing structure for the IGBT module according to the present disclosure, by using the insulation sleeve sleeved on the conductor to insulatedly isolating the conductor from the substrate, the comparative tracking index of the IGBT module is improved, thereby improving the creepage distance of the IGBT module. In addition, compared with conventional technologies of spraying insulation varnish or insulation paste, the insulating property of the insulation sleeve can be better detected and guaranteed, and the bounding between the insulation sleeve and the substrate can be better enhanced, improving the insulation reliability.

Disclosed is a semiconductor device such as a power amplifier. Unlike conventional power amplifiers, thermal bump is patterned to only cover active devices. In this way, dimensions of the semiconductor device can be reduced.

Embodiments disclosed herein may relate to forming a base contact layout in a memory device.

A high-performance HBT that is unlikely to decrease the process controllability and to increase the manufacturing cost is implemented. A heterojunction bipolar transistor includes an emitter layer, a base layer, and a collector layer on a GaAs substrate. The emitter layer is formed of InGaP. The base layer is formed of GaAsPBi having a composition that substantially lattice-matches GaAs.

A semiconductor device includes a semiconductor body having first and second surfaces opposite to each other. The semiconductor body includes a first well region having a first conductivity type, second and third well regions spaced apart from each other in a first direction with the first well region interposed therebetween and having a second conductivity type, first doped regions spaced apart from each other in a second direction intersecting the first direction in the first well region, a second doped region, which is adjacent to the second well region and has the second conductivity type, and a third doped region, which is adjacent to the third well region and has the second conductivity type. The second surface of the semiconductor body includes bottom surfaces of the first to third well regions, the plurality of first doped regions, the second doped region, and the third doped region.

Disclosed is a semiconductor device such as a power amplifier. Unlike conventional power amplifiers, thermal bump is patterned to only cover active devices. In this way, dimensions of the semiconductor device can be reduced.

An insulated gate bipolar field-effect transistor (IGBT) includes a semiconductor chip, a gate pin disposed around the semiconductor chip, and an emitter region and n gate regions that are disposed on the semiconductor chip, where n is an integer greater than or equal to 2; x gate regions in the n gate regions are connected to the gate pin, where x is greater than or equal to 1 and less than or equal to n; when there is a different quantity x of gate regions connected to the gate pin, the IGBT is correspondingly applicable to a scenario in which there is a different switching frequency and a different switching loss; and n−x gate regions in the n gate regions are connected to the emitter region.

Structures including electrical isolation and methods of forming a structure including electrical isolation. A semiconductor layer is formed over a semiconductor substrate and shallow trench isolation regions are formed in the semiconductor layer. The semiconductor layer includes single-crystal semiconductor material having an electrical resistivity that is greater than or equal to 1000 ohm-cm. The shallow trench isolation regions are arranged to surround a portion of the semiconductor layer to define an active device region. A polycrystalline layer is positioned in the semiconductor layer and extends laterally beneath the active device region and the shallow trench isolation regions that surround the active device region.

A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor that supplies a bias current based on a first current which is a part of a control current to the first transistor; a current output element in which a current flowing therethrough increases in accordance with a rise in temperature; and a wiring portion including a plurality of metal layers that are electrically connected to an emitter of the first transistor and that are stacked one on top of another so as to oppose the semiconductor substrate. At least one metal layer among the plurality of metal layers extends so as to overlap an area extending from at least a part of a first disposition area in which the first transistor is disposed to a second disposition area in which the current output element is disposed in plan view of the semiconductor substrate.