Patent classifications
H01L27/1262
Display substrate, manufacturing method thereof, display panel, and display device
A method of manufacturing a display substrate which includes a central display area and an arc-shaped stretch area located at a corner of the central display area, wherein the method includes: preparing a substrate to be etched, which includes a flexible substrate, a stack structure disposed on the flexible substrate, and a last-dry-etched metal layer disposed on a side of the stack structure away from the flexible substrate, the stack structure including an active layer, at least one conductive layer, and a plurality of insulating layers, wherein the last-dry-etched metal layer is a last metal layer that is formed through dry etching; and forming a stretch groove by patterning the substrate to be etched, wherein the stretch groove is disposed in the stretch area and passes through the stack structure and a part of the flexible substrate. A display substrate, a display panel and a display device are further provided.
Glass substrate, semiconductor device, and display device
A glass substrate has a compaction of 0.1 to 100 ppm. An absolute value |Δα.sub.50/100| of a difference between an average coefficient of thermal expansion α.sub.50/100 of the glass substrate and an average coefficient of thermal expansion of single-crystal silicon at 50° C. to 100° C., an absolute value |Δα.sub.100/200| of a difference between an average coefficient of thermal expansion α.sub.100/200 of the glass substrate and an average coefficient of thermal expansion of the single-crystal silicon at 100° C. to 200° C., and an absolute value |Δα.sub.200/300| of a difference between an average coefficient of thermal expansion α.sub.200/300 of the glass substrate and an average coefficient of thermal expansion of the single-crystal silicon at 200° C. to 300° C. are 0.16 ppm/° C. or less.
Metal structure and method for fabricating same and display panel using same
A metal structure includes a patterned molybdenum tantalum oxide layer and a patterned metal layer. The patterned molybdenum tantalum oxide layer is disposed on a first substrate, in which the patterned molybdenum tantalum oxide layer includes about 2 to 12 atomic percent of tantalum. Both of an atomic percent of molybdenum and an atomic percent of oxygen of the patterned molybdenum tantalum oxide layer are greater than the atomic percent of tantalum of the patterned molybdenum tantalum oxide layer. The patterned metal layer is disposed on the patterned molybdenum tantalum oxide layer.
Display module with improved electrical test and manufacturing method of the display module
A display module including a glass substrate; a thin film transistor layer disposed in a first area of the glass substrate; a plurality of connection pads disposed in a second area extending from the first area of the glass substrate and electrically connected to the thin film transistor layer; a plurality of test pads disposed in a third area extending from the second area of the glass substrate and electrically connected to the plurality of connection pads, respectively, and a plurality of connection wirings electrically connecting the plurality of connection pads and the plurality of test pads.
Manufacturing method of display device
A method of manufacturing a display device in a chamber in which a material including yttrium is coated on an inner surface includes: forming a first layer pattern by dry etching on a substrate; depositing a second layer material on the first layer pattern; forming a photoresist pattern on the second layer material; completing a second layer pattern by using the photoresist pattern as an etch mask; and performing an additional acid etching process by using an etching solution including at least one of hydrochloric acid, sulfuric acid, or nitric acid before the forming of the photoresist pattern on the second layer material after the dry etching to form the first layer pattern.
GLASS SUBSTRATE AND DISPLAY DEVICE COMPRISING THE SAME
Disclosed herein are methods for making a thin film device and/or for reducing warp in a thin film device, the methods comprising applying at least one metal film to a convex surface of a glass substrate, wherein the glass substrate is substantially dome-shaped. Other methods disclosed include methods of determining the concavity of a glass sheet. The method includes determining the orientation of the concavity and measuring a magnitude of the edge lift of the sheet when the sheet is supported by a flat surface and acted upon by gravity. Thin film devices made according to these methods and display devices comprising such thin film devices are also disclosed herein.
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure discloses an array substrate, a display device and manufacturing methods thereof. The array substrate comprises: a base, a gate metal layer, an active layer, a source/drain metal layer, and a pixel electrode layer, wherein the array substrate has a storage capacitor region; in the storage capacitor region, the gate metal layer, the active layer, the source/drain metal layer and the pixel electrode layer comprise respective patterns; wherein, the projections of the gate metal layer storage pattern, the active layer storage pattern, the source/drain metal layer storage pattern, and the pixel electrode layer storage pattern on the base at least partially overlap, and the pixel electrode layer storage pattern is electrically connected to the gate metal layer storage pattern to form a first electrode of the storage capacitor, the active layer storage pattern is electrically connected to the source/drain metal layer storage pattern to form a second electrode.
Manufacturing Method for COA Substrate
The disclosure provides a manufacturing method for COA substrate: utilizing PEDOT, PProDOT or PEDOT derivatives with or without doping with graphene, or PProDOT derivatives replaces traditional ITO to be conductive materials of pixel electrodes; quantum dots can be modified by ProDOT derivatives or EDOT derivatives which including carboxyl group, and quantum dot color filters of red filter layers, green filter layer and blue filters layers comprised on the TFT substrate are formed by the method of electric chemical deposition based on a property of the aforementioned two being able to polymerize under influences of electric field and pixel electrode patterns on the TFT substrate. Therefore, zero waste can be achieved in quantum dots, a usage of quantum dots can be decreased, indium usage can be decreased, researching and development cost can be reduced, and the circumstances can be protected, furthermore, the QDs color film having the better bonding strength bonds the counter electrode layer through chemical bond, and avoids adverse results as a peel is caused by insufficient bonding strength between photoresist and substrate.
MATRIX DEVICE AND MANUFACTURING METHOD OF MATRIX DEVICE
In a matrix device having two or more systems of electrode groups such as X and Y systems, the one or more electrode groups are grouped into groups each consisting of a plurality of pixel electrodes, connection wires are branched off and connected to the pixel electrodes so that the same signal is not supplied to the pixel electrodes of the same group but the same signal is supplied to one pixel electrode of two or more groups, switching elements are provided corresponding to the individual pixel electrodes, and a gate electrode and a gate insulating film of the switching elements are used in common in the same group. Accordingly, in the matrix device and manufacturing of the matrix device, the number of connection wires and driver ICs is reduced.
ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY PANEL
An array substrate and a method for manufacturing the same, a display panel, and a display device are provided. The array substrate includes a base substrate, a stacked structure, a common-electrode line, and a conductive structure. The stacked structure is disposed on a first surface of the substrate. The stacked structure includes a contact pad, a common-electrode layer, and a gate line. The contact pad is disposed on the first surface of the base substrate. The base substrate defines a first via hole at a position corresponding to the contact pad. The common-electrode layer is connected with the contact pad. The common-electrode line is disposed on a second surface of the base substrate. An orthographic projection of the gate line on a plane where the common-electrode line is located at least partially overlaps with the common-electrode line. The conductive structure is connected with the contact pad and the common-electrode line.