A display apparatus and a method of manufacturing the same are provided. According to an embodiment, a display apparatus includes: a substrate; a thin-film transistor located on the substrate; and a buffer layer, a conductive layer, and an insulating layer sequentially located from the substrate between the substrate and the thin-film transistor, and a thickness of the insulating layer is less than a thickness of the buffer layer.

An array substrate, includes: a substrate, a first metal layer, a first buffer layer, and an active layer, a gate insulating layer, a second metal layer, a first insulating layer, a third metal layer and a first planarization layer. The first metal layer is electrically connected with the first doped area of the active layer through the bridge layer of the second metal layer. The third metal layer is electrically connected with the second doped area of the active layer. The array substrate of the present disclosure reduces a size of a thin film transistor by stacking the first metal layer, the second metal layer, and the third metal layer, thereby increasing pixel density. A display panel is also provided.

A manufacturing method of a display apparatus including preparing a substrate, forming an amorphous silicon layer on the substrate, cleaning the amorphous silicon layer with hydrofluoric acid, crystallizing the amorphous silicon layer into a polycrystalline silicon layer, and forming a metal layer directly on the polycrystalline silicon layer.

A display device and a method of manufacturing a display device are provided. A display device includes a lower conductive pattern disposed on a substrate, a lower insulating layer disposed on the lower conductive pattern, the lower insulating layer including a first lower insulating pattern including an overlapping region overlapping the lower conductive pattern, and a protruding region. The display device includes a semiconductor pattern disposed on the first lower insulating pattern and having a side surface, the side surface being aligned with a side surface of the first lower insulating pattern or disposed inward from the side surface of the first lower insulating pattern, a gate insulating layer disposed on the semiconductor pattern, a gate electrode disposed on the gate insulating layer, and an empty space disposed between the substrate and the protruding region of the first lower insulating pattern.

A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.

A light emitting display device includes: a light emitting element; a second transistor connected to a scan line; a first transistor which applies a current to the light emitting element; a capacitor connected to a gate electrode of the first transistor; and a third transistor connected to an output electrode of the first transistor and the gate electrode of the first transistor. Channels of the second transistor, the first transistor, and the third transistor are disposed in a polycrystalline semiconductor layer, and a width of a channel of the third transistor is in a range of about 1 μm to about 2 μm, and a length of the channel of the third transistor is in a range of about 1 μm to about 2.5 μm.

A display device includes a first light blocking layer disposed on a substrate, a second light blocking layer disposed on the substrate and spaced apart from the first light blocking layer, an active layer including a first area disposed on the first light blocking layer, a second area disposed on the substrate between the first light blocking layer and the second light blocking layer, and a third area disposed between the first area and the second area, a gate electrode disposed on the active layer and overlapping a portion of the first area, a first electrode disposed on the gate electrode, and including at least a portion overlapping the first light blocking layer, and a second electrode disposed on the gate electrode, and including at least a portion overlapping the second light blocking layer and at least another portion overlapping the third area of the active layer.

A display substrate, a preparation method and driving method therefor, and a display apparatus. The display substrate includes a substrate and a switch structure arranged on the substrate, the switch structure being electrically connected to a control signal terminal, a signal input terminal and a signal output terminal. The switch structure comprises a switching unit. The switching unit comprises a first transistor and a second transistor; and the types of the first transistor and the second transistor are opposite. The first transistor comprises: a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The second transistor comprises: a second active layer, a second gate electrode, a second source electrode, and a second drain electrode.

A display substrate, a display apparatus, and a manufacturing method of the display substrate are provided. The display substrate includes: a base substrate; and a crystallization induction layer and a polysilicon layer stacked on the base substrate. The crystallization induction layer includes induction layer patterns and intervals between the induction layer patterns. The polysilicon layer includes a portion overlapping the induction layer patterns and a portion overlapping the intervals, a crystallinity of the portion of the polysilicon layer overlapping the induction layer patterns is larger than a crystallinity of the portion of the polysilicon layer overlapping the intervals.

A carrier substrate to be used, when manufacturing a member for an electronic device on a surface of a substrate, by being bonded to the substrate, includes at least a first glass substrate. The first glass substrate has a compaction described below of 80 ppm or less. Compaction is a shrinkage in a case of subjecting the first glass substrate to a temperature raising from a room temperature at 100° C./hour and to a heat treatment at 600° C. for 80 minutes, and then to a cooling to the room temperature at 100° C./hour.